Monolithic class d amplifier

Abstract

A monolithic 1.75 is mounted in a speaker cabinet 1.71 to drive the voice coil 1.74 of the speaker 1.70. The monolithic integrated circuit may be a class D amplifier 1.10, and is at least a half-bridge or full bridge power MOSFET device. Structures and process for forming the mos switching devices 2.20 of the bridge driver circuits are disclosed. Also disclosed is the N+ buried layer 4.14 of the QVDMOS transistors 4.43 of the bridge circuits.

1 . A method of forming a monolithic integrated circuit, the method comprising: 
 forming a bridge circuit having at least one quasi vertical DMOS (QVDMOS) in a substrate, wherein the at least one QVDMOS requires a first level power to operate; and    forming a driver circuit having at least one additional device in the same substrate, wherein the at least one additional device requires a second different level of power to operate.    
   
   
       2 . The method of  claim 1 , wherein forming the at least one QVDMOS in the substrate further comprises: 
 forming a current path with an epitaxial layer, a conductive buried layer in the substrate and a sinker diffusion to the buried layer.    
   
   
       3 . The method of  claim 1 , wherein forming at least one of the QVDMOS further comprises: 
 forming a buried layer in the substrate, the substrate having a first conductivity type and the buried layer having a second conductivity type with a relatively high dopant concentration;    forming an epitaxial layer on the substrate and over the buried layer, the epitaxial layer having a second conductivity type;    forming a drain region that extends from a surface of the epitaxial layer to the buried layer, the drain region having a second conductivity type;    forming a body region in the surface of the epitaxial layer, the body region being spaced from the drain region and having a first conductivity type;    forming a source region in the body region having a relatively shallow depth and having a second conductivity type;    forming a body tie in the body region having a first type of conductivity, the body tie having a depth slightly greater than the depth of the source region and extending under and not beyond the source region; and    forming a gate that is insulated from the epitaxial layer and extends over the source and body regions.    
   
   
       4 . The method of  claim 3 , further comprising: 
 forming isolation regions of the first conductivity type having high dopant density next to the at least one QVDMOS to isolate the operations of the at least one QVDMOS from the at least one other MOS device.    
   
   
       5 . The method of  claim 1 , wherein the at least one additional device is a MOS transistor.  
   
   
       6 . The method of  claim 1 , wherein the at least one additional device is a bipolar transistor.  
   
   
       7 . The method of  claim 5 , further comprising: 
 forming body ties of the at least one QVDMOS at the same time as the forming the drains and sources for the MOS transistor.    
   
   
       8 . The method of  claim 7 , further comprising: 
 forming a body tie for the MOS transistor at the same time as forming body ties of the at least one QVDMOS.    
   
   
       9 . A method of forming a monolithic integrated circuit (IC) to drive a speaker, the method comprising: 
 forming a driver circuit in a substrate of the IC; and    forming a bridge circuit in the same substrate.    
   
   
       10 . The method of  claim 9 , wherein forming the bridge circuit further comprises: 
 forming two or more quasi vertical DMOS (QVDMOS) transistors.    
   
   
       11 . The method of  claim 10 , wherein forming each quasi vertical DMOS (QVDMOS) transistors further comprises: 
 forming a buried layer in the substrate, the substrate having a first conductivity type and the buried layer having a second conductivity type with a relatively high dopant concentration;    forming an epitaxial layer on the substrate and over the buried layer, the epitaxial layer having a second conductivity type;    forming a drain region that extends from a surface of the epitaxial layer to the buried layer, the drain region having a second conductivity type;    forming a body region in the surface of the epitaxial layer, the body region being spaced from the drain region and having a first conductivity type;    forming a source region in the body region having a relatively shallow depth and having a second conductivity type;    forming a body tie in the body region having a first type of conductivity, the body tie having a depth slightly greater than the depth of the source region and extending under and not beyond the source region; and    forming a gate that is insulated from the epitaxial layer and extends over the source and body regions.    
   
   
       12  The method of  claim 10 , further comprising: 
 forming isolation regions of a select conductivity type having high dopant density next to at least one of the QVDMOS transistors to isolate the operations of the at least one of the QVDMOS transistors from devices of the driver circuit, wherein the select conductivity type of the isolation regions is the same conductivity type as the substrate.    
   
   
       13 . The method of  claim 9 , wherein forming the driver circuit further comprises: 
 forming one or more MOS switch transistors.    
   
   
       14 . The method of  claim 13 , wherein forming each MOS switch transistor comprises: 
 forming four drain regions spaced from each other;    forming a common gate enclosing the drain regions; and    forming a source region centrally located among the drain regions, said source region comprising a pair of elongated source distribution regions disposed transverse to each other, adjacent the common enclosing gate and between adjacent drain regions.    
   
   
       15 . A method of providing a power signal to drive a speaker, the method comprising: 
 translating conditioning pulses to drive voltage level pulses with a bridge driver circuit formed in a substrate; and    generating output power voltage pulses at a power voltage level to drive the speaker with a bridge circuit formed in the same substrate as the bridge driver circuit, the output power voltages being based on the drive voltage level pulses.    
   
   
       16 . The method of  claim 15 , wherein the conditioning pulses are class D amplifier conditioning pulses.  
   
   
       17 . The method of  claim 15 , wherein the bridge driver is formed by at least one of a MOS, CMOS and a BiCMOS device.  
   
   
       18 . The method of  claim 15 , wherein generating output power voltage pulses at a power voltage level with a bridge circuit formed in the same substrate as the bridge driver circuit based on the drive voltage level pulses further comprises: 
 applying the drive voltage level pulses to gates of power MOSFETs in the bridge driver circuit.    
   
   
       19 . The method of  claim 15 , further comprising: 
 generating the conditioning pulses with a conditioning circuit that are representative of an amplitude and frequency of a received audio input signal.    
   
   
       20 . The method of  claim 19 , wherein generating the conditioning pulses with a conditioning circuit that is representative of an amplitude and frequency of a received audio input signal, further comprises: 
 receiving an audio frequency input signal;    sampling the audio input signal at a frequency substantially greater than the highest audio frequency in the audio input signal; and    comparing the sampled audio signal to a reference signal to a reference voltage signal to provide the conditioning pulse, wherein the each pulse has an amplitude of the reference voltage signal and a width proportional to the amplitude of the sampled audio signal.