Input system for a variable gain amplifier having class-AB transconductance stages

Abstract

An amplifier has an input terminal to receive an input signal. The amplifier includes a first gain stage comprising a pair of input transistors and a second gain stage to drive an output stage. The output stage provides inverting and non-inverting differential output signals on inverting and non-inverting output nodes. The amplifier may also include a feedback signal electrically connected between the inverting and non-inverting output nodes to emitters of the input transistors through a resistor network.

1 . An amplifier, comprising: 
 an input terminal to receive a single input signal;    a first opposite side comprising a non-inverting output node to provide a non-inverting output signal;    a second opposite side comprising an inverting output node to provide an inverting output signal; and    a second gain stage current source biased dynamically dependent upon the opposite side output signal.    
   
   
       2 . The amplifier of  claim 1 , the first stage further comprising a pair of differential transistors having emitters electrically coupled to the high output node through a feedback resistor network.  
   
   
       3 . A selectable-gain amplifier comprising: 
 an attenuator having an input terminal and a plurality of output terminals, wherein the attenuator is constructed to generate a plurality of output signals at the output terminals responsive to an input signal received an the input terminal; and    a selection stage coupled to the attenuator and arranged to select one of the plurality of output signals responsive to a gain control signal.    
   
   
       4 . The amplifier of  claim 3  wherein the selection stage comprises a plurality of gm cells.  
   
   
       5 . A variable gain amplifier comprising: 
 an attenuator having a plurality of pairs of tap points; and    a plurality of pairs of gm cells, wherein each pair of gm cells is coupled to a corresponding pair of the tap points.    
   
   
       6 . The amplifier of  claim 5  wherein each pair of gm cells is constructed and arranged to operate as a multi-tanh cell.  
   
   
       7 . An integrated circuit comprising: 
 a bipolar junction transistor arranged to operate as a saturating switch;    wherein the transistor is dielectrically isolated.