US2006245245A1PendingUtilityA1
Non-volatile memory cell using high-k material and inter-gate programming
Est. expiryJan 21, 2024(expired)· nominal 20-yr term from priority
H10D 64/685H10D 64/035H10D 30/6891H10D 30/681H10D 30/0411H10B 41/30H10B 69/00
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Claims
Abstract
A non-volatile memory device has a channel region between source/drain regions, a floating gate, a control gate, a first dielectric region between the channel region and the floating gate, and a second dielectric region between the floating gate and the control gate. The first dielectric region includes a high-K material. The non-volatile memory device is programmed and/or erased by transferring charge between the floating gate and the control gate via the second dielectric region.
Claims
exact text as granted — not AI-modified1 . A method of making a non-volatile storage device, comprising:
depositing a high-K material over a region of a semiconductor to be used as a channel region; depositing a floating gate over said high-K material; adding a dielectric region over said floating gate; and adding a control gate over said dielectric material, said non-volatile storage device is erased by transferring charge from said control gate to said floating gate via said dielectric region.
2 . A method according to claim 1 , wherein:
said dielectric region includes tunnel oxide.
3 . A method according to claim 1 , wherein said step of adding a control gate includes:
depositing a poly-silicon layer; and depositing a low resistivity layer above said poly-silicon layer.
4 . A method according to claim 1 , wherein said step of adding a control gate includes:
depositing a tungsten nitride barrier layer; and depositing a tungsten layer over said tungsten nitride layer.
5 . A method according to claim 1 , further comprising:
adding an epitaxially grown silicon region.
6 . A method according to claim 1 , wherein:
said steps of depositing a high-K material, depositing a floating gate, depositing a second dielectric, and depositing a control gate include performing any one of chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
7 . A method according to claim 1 , further comprising:
performing sidewall oxidation, said sidewall oxidation causes rounding of edges of said floating gate and said control gate.
8 . A method according to claim 1 , wherein:
said non-volatile storage device is programmed by transferring charge from said floating gate to said control gate.
9 . A method according to claim 1 , wherein:
said non-volatile storage device is a multi-state flash memory device.
10 . A method according to claim 1 , wherein:
said non-volatile storage device is a multi-state NAND flash memory device.
11 . A method according to claim 1 , wherein:
said depositing a high-K material includes depositing Aluminum Oxide.
12 . A method according to claim 1 , further comprising:
adding an oxide spacer next to said high-K material, said dielectric region, said floating gate and said control gate.
13 . A method according to claim 1 , further comprising:
adding a spacer next to said floating gate.
14 . A method according to claim 1 , further comprising:
adding a nitride spacer on a side of said high-K material.
15 . A method according to claim 1 , further comprising:
adding a metal fin on a side of said control gate.
16 . A method of making NAND flash memory, comprising:
creating source/drain regions within a substrate; depositing a high-K material over said substrate; depositing a floating gate layer over said high-K material; etching through said high-k material and said floating gate layer to form NAND strings; adding a dielectric layer over said floating gate layer; adding a control gate layer over said dielectric layer; and etching through said control gate layer to separate non-volatile storage devices on said NAND strings, said non-volatile storage devices program by transferring electrons from their floating gates to their control gates via said dielectric layer and erase by transferring electrons from their control gates to their floating gates via said dielectric layer.
17 . A method according to claim 16 , wherein:
said non-volatile storage devices program by tunneling electrons from their floating gates to their control gates via said dielectric layer and erase by tunneling electrons from their control gates to their floating gates via said dielectric layer.
18 . A method according to claim 16 , wherein:
said non-volatile storage devices program by Fowler-Nordheim tunneling electrons from their floating gates to their control gates via said dielectric layer and erase by Fowler-Nordheim tunneling electrons from their control gates to their floating gates via said dielectric layer.
19 . A method of making a non-volatile storage device, comprising:
depositing a high-K material over a region of a semiconductor to be used as a channel region; depositing a floating gate over said high-K material; adding a dielectric region over said floating gate; and adding a control gate over said dielectric material, said non-volatile storage device transfers electrons from said control gate to said floating gate via said dielectric region.
20 . A method according to claim 19 , wherein:
said adding said dielectric region includes depositing or growing oxide material; said non-volatile storage device erases by transferring charge from said control gate to said floating gate via said dielectric region; and said non-volatile storage device programs by transferring charge from said floating gate to said control gate via said dielectric region.Cited by (0)
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