A capacitor electrode having an interface layer of different chemical composition formed on a bulk layer
Abstract
An improved capacitor that is less susceptible to the depletion effect and methods for providing the same. The capacitor comprises a first and second electrode and an insulating layer interposed therebetween. The first electrode includes a bulk layer comprising n-doped polysilicon. The first electrode also includes an interface layer extending from a first surface of the bulk layer to the insulating layer. The interface layer is heavily doped with phosphorus so that the depletion region of the first electrode is confined substantially within the interface layer. The method of forming the interface layer comprises depositing a layer of hexamethldisilazane (HMDS) material over the first surface of the bulk layer so that HMDS molecules of the HMDS material chemically bond to the first surface of the bulk layer. The method further comprises annealing the layer of HMDS material in a phosphine ambient so as to replace CH 3 methyl groups with PH 3 molecules. The interface layer is then passivated in a nitrogen ambient having a reduced temperature so as to reduce the number of dangling silicon bonds of the lower electrode in a manner that results in reduced thermal damage to neighboring circuit elements.
Claims
exact text as granted — not AI-modified1 . A method of confining a depletion region in a capacitor, comprising:
forming a first electrode comprising a plurality of dopant atoms, said first electrode having a first surface comprising a plurality of bonding sites thereon; and forming an adhesive layer on an upper surface of the first electrode, said adhesive layer comprising a plurality of adhesive molecules, wherein a substantial portion of the adhesive molecules bonds to the bonding sites on the first electrode, wherein said adhesive molecules capture dopant atoms in the first electrode so that the dopant atoms are disposed adjacent the adhesive layer so as to substantially confine a depletion region in the first electrode to an area adjacent the adhesive layer.
2 . The method of claim 1 , wherein forming the adhesive layer comprises forming a layer having a chemical composition that is different from that of the first electrode.
3 . The method of claim 2 , wherein forming the adhesive layer comprises forming a layer comprising HMDS.
4 . The method of claim 1 , wherein the dopant atoms in said interface layer comprises a plurality of phosphorous atoms.
5 . The method of claim 1 , wherein forming the first electrode comprises forming a bulk layer comprised of silicon.
6 . The method of claim 5 , further comprising passivating the first electrode so as to inhibit the formation of silicon dioxide.
7 . The method of claim 1 , wherein forming the adhesive layer comprises forming a layer having a plurality of CH 3 methyl groups.
8 . The method of claim 1 , wherein said bonding sites in the first electrode comprises a plurality of dangling bonds of Si atoms disposed adjacent the upper surface of the first electrode.
9 . A method of forming a capacitor, comprising:
forming a first conducting electrode comprising a bulk layer having a first surface and a plurality of bonding sites thereon; forming an interface layer on the first surface, said interface layer having a chemical composition different from said bulk layer, wherein said interface layer is chemically bonded to the bonding sites on the first surface; chemically bonding a plurality of dopant atoms to said interface layer; forming an insulating layer adjacent said interface layer; and forming a second conducting electrode adjacent to said insulating layer.
10 . The method of claim 9 , wherein forming the interface layer comprises depositing a plurality of CH 3 methyl groups on the first surface of the bulk layer.
11 . The method of claim 10 , wherein chemically bonding a plurality of dopant atoms to said interface layer comprises replacing a substantial portion of the plurality of CH 3 methyl groups with PH 3 molecules.
12 . The method of claim 9 , wherein forming said interface layer comprises depositing a layer of HMDS material.
13 . The method of claim 12 , further comprising annealing the layer of HMDS material in phosphine environment.
14 . The method of claim 9 , wherein forming the first electrode comprises depositing HSG silicon a surface above a semiconductor wafer.Join the waitlist — get patent alerts
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