Passive element chip and manufacturing method thereof, and highly integrated module and manufacturing method thereof

Abstract

A passive element chip permits a reduced size and a higher packaging density to be achieved. The passive element chip has a substrate, a plurality of passive elements formed by metal wires on the substrate, and electrodes for electrically connecting the plurality of passive elements to an external source. The passive elements are isolated from each other.

1 . A manufacturing method for a passive element chip having a plurality of passive elements, comprising: 
 a step for processing an insulating layer and metal wires and depositing them on a substrate to form a plurality of passive elements;    a step for forming, on the insulating layer, a plurality of first electrodes to be connected to the plurality of passive elements; and    a step for covering the insulating layer with a protective film such that the plurality of first electrodes is exposed.    
     
     
         2 . The manufacturing method for a passive element chip according to  claim 1 , further comprising: 
 a step for covering the protective film with a photosensitive resin film such that the plurality of first electrodes is exposed;    a step for forming, on the photosensitive resin film, metal wires to be electrically connected to the plurality of first electrodes;    a step for forming second electrodes to be electrically connected to the metal wires; and    a step for covering the metal wires and the photosensitive resin film with a resin layer such that the second electrodes are partly exposed.    
     
     
         3 . A manufacturing method for a highly integrated module having a plurality of insulating layers, comprising: 
 a step for disposing a passive element chip, which includes a substrate, a plurality of passive elements formed on the substrate by first metal wires, and electrodes for electrically connecting the plurality of passive elements to an external source, on a surface of one of the plurality of insulating layers;    a step for disposing an active element chip, which has active elements and electrodes for electrically connecting the active elements to an external source, on a surface of one of the plurality of insulating layers; and    a step for electrically connecting the electrodes of the passive element chip and the electrodes of the active element chip by second metal wires.