US2006249756A1PendingUtilityA1

Method of manufacturing semiconductor device having trench isolation

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Assignee: RENESAS TECH CORPPriority: Feb 14, 2002Filed: Jul 7, 2006Published: Nov 9, 2006
Est. expiryFeb 14, 2022(expired)· nominal 20-yr term from priority
H10W 10/17H10W 10/014H10W 10/181H10W 10/061H10P 90/1906H10W 10/10H10W 10/011H10B 10/00H10D 86/201H10D 86/01H10D 30/6708H10D 30/6706H10D 30/0323
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Claims

Abstract

A semiconductor device includes a plurality of circuit portions of different functions each constructed by including a MOS transistor on an SOI substrate obtained by sequentially stacking a semiconductor substrate, a buried insulating film and a semiconductor layer. The semiconductor device includes first and second portions. The first circuit portion is isolated by being surrounded with a first insulating film provided on an upper portion of the semiconductor layer and a second insulating film penetrating the semiconductor layer to reach the buried insulating film.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device including a plurality of circuit portions of different functions, each constructed by including a MOS transistor on an SOI substrate obtained by sequentially stacking a semiconductor substrate, a buried insulating film and a semiconductor layer, 
 said semiconductor device comprising first and second circuit portions,    wherein said first circuit portion is isolated by being surrounded with a first insulating film provided on an upper portion of said semiconductor layer and a second insulating film penetrating said semiconductor layer to reach said buried insulating film,    said semiconductor layer existing under said first insulating film as an under-first-insulating-film semiconductor region of a first conductivity type,    a first MOS transistor included in said first circuit portion having    source and drain regions of a second conductivity type formed in a surface of said semiconductor layer,    a gate electrode formed via a gate oxide film above a region of said semiconductor layer between said source and drain regions, and    a semiconductor region of a first conductivity type corresponding to said semiconductor layer located between said source and drain regions,    said second insulating film being disposed so as to surround said source and drain regions, and    wherein said first circuit portion is disposed on an upper portion of said semiconductor layer and comprises a body region of the first conductivity type electrically connected to said semiconductor region through said under-first-insulating-film semiconductor region.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein: 
 a second MOS transistor included in said second circuit portion is isolated by being surrounded with said second insulating film.    
   
   
       3 . The semiconductor device according to  claim 2 , wherein: 
 said first circuit portion has a peripheral circuit; and    said second circuit portion has a memory part.    
   
   
       4 . The semiconductor device according to  claim 2 , wherein: 
 said first circuit portion has an I/O circuit; and    said second circuit portion has a memory part.    
   
   
       5 . The semiconductor device according to  claim 2 , wherein: 
 said first circuit portion has an analog circuit; and    said second circuit portion has a digital circuit.

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