Methods of forming programmable memory devices

Abstract

The invention includes a method of forming a programmable memory device. A tunnel oxide is formed to be supported by a semiconductor substrate. A stack is formed over the tunnel oxide. The stack comprises a floating gate, dielectric mass and control gate. The stack has a top, and has opposing sidewalls extending downwardly from the top. The dielectric mass includes silicon nitride. Silicon nitride spacers are formed along sidewalls of the stack, and a silicon nitride cap is formed over a top of the stack. The silicon nitride within the dielectric mass, cap and/or sidewall spacers is formed from trichlorosilane and ammonia.

1 - 43 . (canceled)  
   
   
       44 . A method of forming a programmable memory device, comprising: 
 providing a monocrystalline silicon material;    forming a stack over the monocrystalline silicon material; the stack comprising, an ascending order from the monocrystalline silicon material: 
 a tunnel oxide directly against the monocrystalline silicon material, the tunnel oxide consisting of silicon dioxide;  
 an electrically conductive floating gate directly against the tunnel oxide;  
 a dielectric mass directly against the floating gate; and  
 an electrically conductive control gate directly against the dielectric mass;  
   the stack having a top surface and having opposing sidewall surfaces extending downwardly from the top surface to the monocrystalline silicon material; the sidewall surfaces including silicon dioxide of the tunnel oxide, electrically conductive material of the floating gate, dielectric material of the dielectric mass, and electrically conductive material of the control gate;    forming silicon nitride directly against the top and sidewall surfaces of the stack; the silicon nitride being formed exclusively from trichlorosilane and ammonia, and having no detectable Si—H therein; and    anisotropically etching the silicon nitride to form sidewall spacers along the sidewall surfaces of the stack.    
   
   
       45 . The method of  claim 44  wherein the dielectric mass comprises silicon nitride; and wherein the silicon nitride of the dielectric mass is formed from trichlorosilane and ammonia.  
   
   
       46 . The method of  claim 44  wherein the stack is formed to further comprise an electrically insulative cap over the control gate; and wherein the forming of the electrically insulative cap comprises forming of the cap to consist of silicon nitride having no detectable Si—H therein.  
   
   
       47 . The method of  claim 46  wherein the top surface of the stack consists of the silicon nitride having no detectable Si—H therein.  
   
   
       48 . The method of  claim 44  wherein the control gate and floating gate are formed to comprise amorphous silicon.