US2006255887A1PendingUtilityA1
Integrated circuit with adjusting elements and method for its manufacture
Est. expiryMay 10, 2025(expired)· nominal 20-yr term from priority
H10P 74/273
35
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Claims
Abstract
An integrated circuit is disclosed with adjusting elements, which in a first manufacturing stage are connected via tracks to terminal pads lying outside the integrated circuit. At least one of the tracks of the integrated circuit lies on a surface of a region, which includes semiconductor material and in a second manufacturing stage is isolated by a pn junction from additional semiconductor material, which is adjacent to the region. Furthermore, a method for manufacturing this type of integrated circuit is also disclosed.
Claims
exact text as granted — not AI-modified1 . An integrated circuit having adjusting elements, which in a first manufacturing, stage are connected via tracks to terminal pads that are provided external to the integrated circuit, wherein at least one of the tracks is provided on a region, which includes semiconductor material and is isolated by a pn junction from additional semiconductor material, which is adjacent to the region.
2 . The integrated circuit according to claim 1 , wherein the at least one track is provided between the integrated circuit and an edge of one of the terminal pads, a distance of the at least one track to the integrated circuit being smaller than a distance between an outer edge of the terminal pad and the integrated circuit.
3 . The integrated circuit according to claim 2 , wherein a remainder of the terminal pad and/or the track that are connected to the integrated circuit after dicing of the integrated circuit are completely isolated from a neighboring semiconductor material by the region and the pn junction.
4 . The integrated circuit according to claim 1 , wherein the at least one track is provided at least partially along terminal pad and in the first manufacturing stage is connected to the terminal pad and in a second manufacturing stage is separated from the terminal pad.
5 . The integrated circuit according to claim 4 , wherein the at least one track is covered at least partially by a passivating layer.
6 . The integrated circuit according to claim 1 , wherein the terminal pads and the at least one track with a first metallization level, which is at a smaller distance to the semiconductor material of the integrated circuit, and a second metallization level, which is at a greater distance to the semiconductor material, have only the metal of the second metallization level.
7 . An integrated circuit having adjusting elements, which are connected in a first manufacturing stage via tracks to terminal pads that are provided external to the integrated circuit, wherein at least one of the tracks runs partially along a terminal pad and, wherein, in the first manufacturing stage, is connected to the terminal pad and in a second manufacturing stage is separated from the terminal pad.
8 . A method of manufacturing an integrated circuit, the method comprising the steps of:
providing adjusting elements, which are connected in a first manufacturing stage via tracks to terminal pads that are provided external to the integrated circuit; isolating at least one region, which is formed of semiconductor material, by a pn junction from additional semiconductor material, which is adjacent to the region; and providing a track on the region of semiconductor material.
9 . The method according to claim 8 , wherein the track extends between the integrated circuit and an edge of the terminal pad, whose distance to the integrated circuit is smaller than a distances between outer edges of the terminal pad and the integrated circuit, so that at least one subsection that faces the track of the terminal pad is also provided within the region.
10 . The method according to claim 9 , wherein the at least one track is provided so that it runs at least partially along a terminal pad, wherein, in a first manufacturing stage the integrated circuit is placed on a wafer together with other integrated circuits, and wherein in a second manufacturing stage the integrated circuit is separated by a dicing step from the other integrated circuits so that a remainder of the track is separated from the terminal pad.
11 . The method according to claim 10 , wherein the track is covered at least partially by a passivating layer before the dicing step.Cited by (0)
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