Method of producing a multilayer microelectronic substrate

Abstract

A method of producing a multilayer microelectronic substrate, in which: a) a number of thermally combinable films with a first compression temperature are provided; b) at least one film with a second compression temperature, which lies above the first compression temperature, is provided; c) at least one of the films with the second compression temperature is arranged between films with the first compression temperature; d) the laminated films are heated to the first compression temperature, and further to a first end-temperature until the films with the first compression temperature are completely compressed, the first end-temperature being kept below the second compression temperature; and e) the laminated films are heated to the second compression temperature and, if applicable, further to a second end-temperature in order to compress the at least one film with the second compression temperature, characterized in that at least one of the films is made from magnetodielectric material, with nickel oxide NiO and ferrous oxide Fe2O3 as the main components of a ferrite which contains bismuth oxide Bi2O3 or a eutectic mixture of lead oxide PbO and at least one further metallic oxide or of bismuth oxide Bi2O3 and at least one further metallic oxide.

1 - 7 . (canceled)  
     
     
         8 . A multilayer microelectronic substrate, characterized in that at least one layer made from a magnetodielectric material has nickel oxide NiO and ferrous oxide Fe 2 O 3  as the main components of a ferrite, which contains bismuth oxide Bi 2 O 3  or a eutectic mixture of lead oxide PbO and at least one further metallic oxide or of bismuth oxide Bi 2 O 3  and at least one further metallic oxide.  
     
     
         9 . A microelectronic substrate as claimed in  claim 8 , characterized in that the further metallic oxide is molybdenic oxide MoO 3 , zinc oxide ZnO, silicon dioxide SiO 2 , boric oxide B 2 O 3  or tungsten oxide WO 3 .  
     
     
         10 . A microelectronic substrate as claimed in  claim 8 , characterized in that the bismuth oxide or the eutectic mixture is contained in a quantity of 10 to 10% by weight of the ferrite.  
     
     
         11 . A microelectronic substrate as claimed in  claim 8 , characterized in that the ferrite has a composition of Ni v Zn w Co y Fe z O 4 , where 0.88≦v≦1, 0≦w≦0.8, 0≦y≦0.03 and 1.7≦z≦2.12.  
     
     
         12 . A microelectronic substrate as claimed in  claim 8 , characterized in that at least one layer has a dielectric ceramic composition.  
     
     
         13 . (canceled)  
     
     
         14 . A microelectronic substrate as claimed in  claim 12 , characterized in that the layer equipped with the magnetoelectric material is embedded between two layers of a dielectric ceramic composition, if appropriate with a dielectric constant ε≧70.  
     
     
         15 . A use of a microelectronic substrate as claimed in  claim 8  as a passive component in miniaturized circuits.