Method to fabricate passive components using conductive polymer

Abstract

A method and structure for an integrated circuit chip has a logic core which includes a plurality of insulating and conducting levels, an exterior conductor level and passive devices having a conductive polymer directly connected to the exterior conductor level. The passive devices contain RF devices which also includes resistor, capacitor, and/or inductor. The resistors can be serpentine resistors and the capacitors can be interdigitated capacitors.

1 . A method of manufacturing an integrated circuit chip structure comprising: 
 supplying an integrated circuit chip; and    patterning a conductive polymer directly on an exterior conductor level of said integrated circuit chip,    wherein said patterning produces passive devices.    
   
   
       2 . The method in  claim 1 , wherein said passive devices comprise RF devices.  
   
   
       3 . The method in  claim 1 , wherein said passive devices comprise at least one of resistors, capacitors, and inductors.  
   
   
       4 . The method in  claim 3 , wherein said resistors comprise serpentine resistors.  
   
   
       5 . The method in  claim 3 , wherein said capacitors comprise interdigitated capacitors.  
   
   
       6 . A method of manufacturing an integrated circuit chip structure comprising: 
 supplying an integrated circuit chip; and    patterning a conductive polymer directly on an exterior conductor level of said integrated circuit chip, wherein said patterning produces passive devices, and    wherein said patterning is performed such that said passive devices comprise an integral part of said integrated circuit chip.    
   
   
       7 . The method in  claim 6 , wherein said passive devices comprise RF devices.  
   
   
       8 . The method in  claim 6 , wherein said passive devices comprise at least one of resistors, capacitors, and inductors.  
   
   
       9 . The method in  claim 8 , wherein said resistors comprise serpentine resistors.  
   
   
       10 . The method in  claim 8 , wherein said capacitors comprise interdigitated capacitors.