Display device
Abstract
The irregularities of characteristics of a pair of transistors, which are prepared by a pseudo single crystallizing technique, are reduced. To achieve this, semiconductor layers are formed on a substrate and have pseudo single crystal regions therein, and a plurality of thin film transistors are arranged inside the pseudo single crystal regions. Two or more of the plurality of thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics thereof, have the direction of the length of the gates of the respective thin film transistors arranged at an inclination of within ±20 degree with respect to the longitudinal direction of the strip-like grown crystals, and they are arranged such that, when channel regions of respective thin film transistors are imaginarily extended in parallel to the growth direction of the strip-like grown crystals, at least portions of the channel regions are superposed on each other.
Claims
exact text as granted — not AI-modified1 . A display device comprising:
a substrate; and a plurality of thin film transistors formed on the substrate, wherein each of the plurality of thin film transistors includes a pseudo single crystal semiconductor whose crystals are grown in an elongate strip-like shape in a direction parallel to the substrate, and of the plurality of thin film transistors, two or more thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics of the transistors, have the direction of the length of gates of the respective thin film transistors arranged with an inclination of within ±20 degree with respect to the longitudinal direction of the strip-like grown crystals, and are arranged such that, when channel regions of the respective thin film transistors are imaginary extended in parallel to the growth direction of the strip-like grown crystals, at least portions of the channel regions are superposed on each other, and arranged such that the directions of currents which flow in the respective thin film transistor are aligned with each other.
2 . A display device according to claim 1 , wherein an extent of superposition of the channel regions is 50% or more.
3 . A display device according to claim 1 , wherein an extent of superposition of the channel regions is 80% or more.
4 . A display device according to claim 1 , wherein the two or more thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics of the transistors, are formed of a differential pair of transistors which constitute a differential amplifying circuit.
5 . A display device according to claim 1 , wherein the two or more thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics of the transistors, are formed of a pair of transistors of an active load circuit which constitutes a differential amplifying circuit.
6 . A display device according to claim 1 , wherein the two or more thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics of the transistors, are formed of a pair of transistors of an active load circuit which constitutes a differential amplifying circuit and a transistor having a gate thereof to which an output voltage of the active load circuit is applied.
7 . A display device according to claim 1 , wherein the two or more thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics of the transistors, are formed of a pair of transistors which constitute a current mirror circuit.
8 . A display device according to claim 1 , wherein the two or more thin film transistors, which are required to exhibit small irregularities relative to each other as characteristics of the transistors, are connected in parallel to each other thus equivalently constituting one transistor.
9 . A display device according to claim 1 , wherein the plurality of thin film transistors are formed on a flat surface.Join the waitlist — get patent alerts
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