Silicon wafer support fixture with roughended surface

Abstract

A silicon-based wafer support tower particularly useful for batch-mode thermal chemical vapor deposition. The surfaces of the silicon tower are bead blasted to introduce sub-surface damage, which produces pits and cracks in the surface, which anchor subsequently deposited layer of, for example, silicon nitride, thereby inhibiting peeling of the nitride film. The surface roughness may be in the range of 0.25 to 2.5 μm. Wafer support portions of the tower are preferably composed of virgin polysilicon. The invention can be applied to other silicon parts in a deposition or other substrate processing reactor, such as tubular sleeves and reactor walls. Tubular silicon members are advantageously formed by extrusion from a silicon melt.

1 . A silicon support fixture, comprising a plurality of silicon parts fixed together, configured to support a plurality of wafers, and having at least major surface portions with a roughened surface having sub-surface damage including pits and cracks penetrating the roughened surface.  
   
   
       2 . The fixture of  claim 1 , wherein the roughened surface has a roughness in a range between 0.25 and 2.5 μm Ra.  
   
   
       3 . The fixture of  claim 2 , wherein said range extends between 0.5 and 1.9 μm Ra.  
   
   
       4 . The fixture of  claim 3 , wherein said range extends between 0.75 and 1.25μm Ra.  
   
   
       5 . The fixture of  claim 1 , wherein at least some of said silicon parts are composed of virgin polysilicon.  
   
   
       6 . The fixture of  claim 1 , further comprising silicon nitride filled into the pits and cracks.  
   
   
       7 . A silicon wafer processing reactor for treating a silicon wafer, including: 
 a processing chamber for a silicon wafer supported therein; and    a part exposed in said chamber composed of silicon and having a roughened exposed surface including pits and cracks penetrating the roughened exposed surface.    
   
   
       8 . The reactor of  claim 7 , wherein said part is a support supporting a plurality of said wafers.  
   
   
       9 . The reactor of  claim 7 , wherein the roughened exposed surface has a surface roughness in a range between 0.25 and 2.5 μm Ra.  
   
   
       10 . The reactor of  claim 9 , wherein said range extends between 0.5 and 1.9 μm Ra.  
   
   
       11 . The reactor of  claim 10 , wherein said range extends between 0.75 and 1.25 μm Ra.  
   
   
       12 . The reactor of  claim 7 , wherein at least some of said silicon parts are composed of virgin polysilicon.  
   
   
       13 . The reactor of  claim 7 , further comprising silicon nitride filled into the pits and cracks.