US2007007347A1PendingUtilityA1

Image input system

48
Assignee: YAHAGI KOUICHIPriority: Apr 18, 2000Filed: May 16, 2006Published: Jan 11, 2007
Est. expiryApr 18, 2020(expired)· nominal 20-yr term from priority
H04N 25/673H04N 25/616H04N 25/61H04N 25/70H04N 25/75
48
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

An image input system comprises a solid state image pickup device and a preprocessor ( 3 ) for performing correlated double sampling amplification on an output signal of the solid state image pickup device and outputting a video signal. The preprocessor comprises: a correlated double sampling amplifier ( 30 ) for outputting signal information corresponding to a difference voltage between the black level in a feedthrough period of the solid state image pickup device and a signal level in a charge signal output period; and offset cancelling means ( 38 ) for applying an offset cancelling voltage for cancelling an offset voltage corresponding to the difference voltage between the black level and the signal level in a state where the solid state image pickup device is optically interrupted to the input terminal of the correlated double sampling amplifier. The correlated double sampling amplifier cancels out the offset voltage and the offset cancelling voltage as signal components of polarities opposite to each other. Circuits at the post stage of the correlated double sampling amplifier are not influenced by the offset voltage. Even if capacitive noise characteristics of the solid state image pickup device are not preferable, a high-grade image can be inputted.

Claims

exact text as granted — not AI-modified
1 - 8 . (canceled)  
     
     
         9 . A semiconductor integrated circuit for a solid state image pickup device, comprising: 
 an amplifier circuit which receives an image signal from the solid state image pickup device, and which amplifies a difference between a first signal value of a black level, which is as a reference level of the image signal, and a second signal value of a signal level of the image signal;    an AD converter which receives an output signal from the amplifier circuit, which converts the output signal from the amplifier circuit to a digital signal, and which outputs the digital signal; and    a first circuit which is able to reduce an offset voltage in connection with the solid state image pickup device, by applying a voltage to an input terminal of the amplifier circuit.    
     
     
         10 . A semiconductor integrated circuit, comprising: 
 an external input terminal which receives an image signal from a solid state image pickup device;    an amplifier circuit which has a first input terminal coupled to the external input terminal, a second input terminal coupled to the external input terminal and an output terminal, and which amplifies a difference between a first signal, which is the image signal in a first period, and a second signal, which is the image signal in a second period, the first signal which relates to the image signal from the first input terminal, the second signal which relates to the image signal from the second input terminal, the first period in which an electric precharge signal is redistributed to an output unit of the solid state image pickup device, and the second period in which an electric charge signal is output to the output unit;    an AD converter which has an input terminal coupled to the output terminal of the amplifier circuit and an output terminal, and which converts an output signal from the amplifier circuit to a digital signal;    a first circuit which has an output terminal coupled to the input terminals of the amplifier, and which outputs a first voltage from the output terminal of the first circuit, the first voltage which corrects the image signal of the external terminal; and    a second circuit which has an input terminal coupled to the output terminal of the AD converter and an output terminal coupled to the input terminal of the AD converter, and which outputs a second voltage from the output terminal of the second circuit, the second voltage which corrects the output signal from the amplifier circuit.    
     
     
         11 . A semiconductor integrated circuit for a CCD, comprising: 
 an external input terminal which receives an image signal from an output unit of the CCD;    a correlated double sampling amplifier which has a first input terminal coupled to the external input terminal, a second input terminal coupled to the external input terminal and an output terminal, and which amplifies a difference between a first level, which is as a black level of the image signal in a feedthrough period, and a second level, which is as a signal level of the image signal in a signal period, the first level which relates to the image signal from the first input terminal, and the second level which relates to the image signal from the second input terminal;    a variable gain amplifier which has an input terminal coupled to the output terminal of the correlated double sampling amplifier circuit and an output terminal and amplifies an output signal from the correlated double sampling amplifier with a variable gain;    an AD converter which has an input terminal coupled to the output terminal of the variable gain amplifier and an output terminal, and which converts an output signal from the output terminal of the variable gain amplifier to a digital signal;    a first circuit which has an output terminal coupled to the input terminal of the correlated double sampling amplifier, and which outputs a first voltage from the output terminal of the first circuit, the first voltage which reduces an offset voltage in connection with a black level signal, the black level signal which is outputs from photoreceivers being optically interrupted, the CD which includes the photoreceivers; and    a second circuit which has an input terminal coupled to the input terminal coupled to the output terminal of the AD converter, an output terminal coupled to the input terminal of the second circuit and the output terminal of the second circuit, and which outputs a second voltage from the output terminal of the second circuit, the second voltage which corrects the output signal from the AD converter by a feedback control based on the digital signal in connection with the black level signal.    
     
     
         12 . A system comprising: 
 a solid state image pickup device which has a plurality of photoreceiver, and an output unit and outputs an image signal from the output unit;    a semiconductor integrated circuit which comprising:    an amplifier circuit which receives the image signal from the output unit and amplifies a difference between a first signal value of a black level, which is as a reference level of the image signal from the solid state image pickup device, and a second signal value, which is as a signal level of the image signal from the solid state image pickup device;    an AD converter which receives an output signal from the amplifier circuit, and which converts the output signal from the amplifier circuit to a digital signal and outputs the digital signal; and    a first circuit which is able to reduce an offset voltage in connection with the solid state image pickup device, by applying a voltage to an input terminal of the amplifier circuit; and    a processing unit which controls the semiconductor integrated circuit.    
     
     
         13 . A system comprising: 
 a solid state image pickup device which has a plurality of photoreceiver, an an output unit and outputs an image signal from the output unit;    a semiconductor integrated circuit which comprises:    an external input terminal which receives the image signal from the output unit; an amplifier circuit which has a first input terminal coupled to the external input terminal, a second input terminal coupled to the external input terminal and an output terminal, and which amplifies a difference between a first signal, which is the image signal in a reference period, and a second signal, which is the image signal in a signal period, the first signal which relates to the image signal from the first input terminal, and the second signal which relates to the image signal from the second input terminal;    an AD converter which has an input terminal coupled to the output terminal of the amplifier circuit and an output terminal, and which converts an output signal from the output terminal, and which converts an output signal from the output terminal of the amplifier circuit to a digital signal;    a first circuit which has an output terminal coupled to the input terminals of the amplifier, and which outputs a first voltage from the output terminal of the first circuit, the first voltage which corrects the image signal of the external input terminal; and a second circuit which has an output terminal coupled to the input terminal of the AD converter, and which outputs a second voltage from the output terminal of the second circuit, the second voltage which corrects the output signal from the amplifier circuit; and    a processing unit which is coupled to the semiconductor integrated circuit, and which controls the semiconductor integrated circuit.    
     
     
         14 . A system comprising: 
 a solid state image pickup device which has a plurality of photoreceiver, and an ouput unit, and which outputs an image signal from the output unit;    a semiconductor integrated circuit which comprises:    an external input terminal which receives the image signal from the output unit;    an amplifier circuit which has an input terminal coupled to the external input terminal and an output terminal, and which amplifies the image signal;    an AD converter which has an input terminal receiving an output signal from the output terminal of the amplifier circuit and an output terminal of the amplifier circuit to a digital signal; a first circuit which has an output terminal coupled to the input terminal of the amplifier circuit, and which corrects the image signal of the input terminal of the amplifier circuit based on the digital signal;    a second circuit which has an input terminal coupled to the output terminal of the AD converter, an output terminal coupled to the input terminal of the AD converter and a DA converter between the input terminal of the second circuit and the output terminal of the second circuit, and which corrects the output signal of the amplifier circuit; and    a processing unit which controls the semiconductor integrated circuit, and which sets a gain value for the amplifier circuit and a correct level for the first circuit.    
     
     
         15 . A system comprising: 
 a charge coupled device which has a plurality of photoreceiver, and an output and outputs an image signal from the output unit;    a semiconductor integrated circuit which comprises: an external input terminal which receives the image signal from the output unit; a first amplifier circuit which has an input terminal coupled to the external input terminal and an output terminal, and which amplifies a difference between a first signal, which is the image signal in a first period, and a second signal, which is the image signal in a second period; a second amplifier circuit which has an input terminal coupled to the output terminal of the first amplifier and an output terminal, and which amplifies an output signal from the first amplifier circuit with a variable gain;    an AD converter which has an input terminal receiving an output signal from the second amplifier circuit and an output terminal, and which converts the output signal from the second amplifier circuit to a digital signal;    a first circuit which has an output terminal coupled to the input terminal of the first amplifier circuit, and which corrects the image signal of the input terminal of the first amplifier circuit;    a second circuit which has an input terminal coupled to the output terminal of the AD converter, an output terminal coupled to the input terminal of the AD converter and a DA converter between the input terminal of the second circuit and the output terminal of the second circuit, and which corrects the output signal of the second amplifier; and    a processing unit which controls the semiconductor integrated circuit, and which sets a gain value for the variable gain.    
     
     
         16 . A image signal processor, comprising: 
 a first circuit which inputs a analog signal from outside via a first terminal;    a second circuit which inputs an output of the first circuit, and outputs a digital signal to outside via sa second terminal; and    a third terminal which inputs a digital signal to provide the first circuit,    wherein the first circuit amplifiers the analog signal of the first terminal,    wherein the digital signal of the third terminal indicates a offset canceling voltage of black level signal, and wherein the offset canceling voltage concerns an offset voltage in connection with a solid state image pickup device.    
     
     
         17 . The image signal processor according to  claim 16 , 
 wherein the first circuit has two inputs, which includes a first input provided a predetermined reference signal and the digital signal of the third terminal, and a second input provided the analog signal of the first terminal.    
     
     
         18 . The image signal processor according to  claim 17 , 
 wherein the second circuit converts the output of the first circuit into the digital signal including plurality of bits.    
     
     
         19 . A image signal processor, comprising: 
 a first circuit which is amplifier inputted a analog signal from a CCD device of outside and a reference signal; and    a second circuit which converts an output of the first circuit into a digital signal of the CCD device,    wherein said first circuit has two input including a first input, which receives the analog signal from the CCD device, and a second input which receives a offset canceling voltage and a reference signal from the CCD device,    wherein the offset canceling voltage concerns an offset voltage in connection with the CCD device.    
     
     
         20 . A signal processing apparatus including: 
 an input terminal which receives an input signal;    an output terminal which outputs an output signal;    a differential amplifier which is coupled between the input terminal and the output terminal and generates a first signal in accordance with a difference between the input signal and a reference level;    a feedback loop which includes an analog to digital converter and compensating means and which receives a first signal and outputs the output signal; and    an offset canceling circuit which cancels an offset voltage, and which is coupled to the input terminal.    
     
     
         21 . A semiconductor device including: 
 an input terminal which is inputted a first signal which has a first period, a second period following to the first period and a third period following to the second period;    an output terminal which outputs a second signal;    a sampling circuit which receives the first signal, outputs a third signal in accordance with a difference between the signal level of the second period of the first signal and the signal level of the third period of the first signal; and    a reference clamp circuit which counts a difference between the signal level of a fourth period of the third signal corresponding to the second period of the first signal and a reference level, add the difference to the third signal and outputs the second signal.    
     
     
         22 . A analog signal processor for processing a analog photo image signal, comprising: 
 an input terminal which receives the analog photo image signal from a photo image device;    an output terminal which outputs a digitized photo image signal;    a differential amplifier which is coupled to the input terminal; and    a feedback loop which is arranged between the differential amplifier and the output terminal,    wherein the analog photo image signal includes a first state which the photo image device is receiving a light and a second state which the photo image device cut off the light and each of which state is includes a first period, a second period following to the first period and a third period following to the second period;    wherein the differential amplifier which receives the first state or the second state of the analog photo image signal, outputs a first signal in accordance with a difference between the signal level of the second period of the analog photo image signal and the signal level of the third period of the analog photo image signal, and    wherein feedback loop receives the first signal while the differential amplifier processing the second state of the analog photo image signal, counts a difference between a signal level of a fourth period of the first signal corresponding to the second period and a signal level of a fifth period of the fifth period corresponding to the third period,    add the difference to the first signal while the differential amplifier processing the first state of the analog photo image signal and outputs the second signal.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.