Embedded waveguide detectors

Abstract

A method of fabricating a detector that involves: forming a trench in a substrate, the substrate having an upper surface; forming a first doped semiconductor layer on the substrate and in the trench; forming a second semiconductor layer on the first doped semiconductor layer and extending into the trench, the second semiconductor layer having a conductivity that is less than the conductivity of the first doped semiconductor layer; forming a third doped semiconductor layer on the second semiconductor layer and extending into the trench; removing portions of the first, second and third layers that are above a plane defined by the surface of the substrate to produce an upper, substantially planar surface and expose an upper end of the first doped semiconductor layer in the trench; forming a first electrical contact to the first semiconductor doped layer; and forming a second electrical contact to the third semiconductor doped layer.

1 . A method of fabricating a detector, said method comprising: 
 forming a trench in a substrate, said substrate having an upper surface;    forming a first doped semiconductor layer on the substrate and in the trench;    forming a second semiconductor layer on the first doped semiconductor layer and extending into the trench, said second semiconductor layer having a conductivity that is less than the conductivity of the first doped semiconductor layer;    forming a third doped semiconductor layer on the second semiconductor layer and extending into the trench;    removing portions of the first, second and third layers that are above a plane defined by the surface of the substrate to produce an upper, substantially planar surface and expose an upper end of the first doped semiconductor layer in the trench;    forming a first electrical contact to the first semiconductor doped layer; and    forming a second electrical contact to the third semiconductor doped layer.    
   
   
       2 . The method of  claim 1 , wherein forming the first doped semiconductor layer on the substrate involves depositing silicon.  
   
   
       3 . The method of  claim 2 , wherein forming the second semiconductor layer on the first doped semiconductor layer involves depositing a SiGe alloy.  
   
   
       4 . The method of  claim 3 , wherein forming the third doped semiconductor layer on the second semiconductor layer involves depositing silicon.  
   
   
       5 . The method of  claim 4 , wherein the depositing the first, second and third layers involves epitaxially depositing.  
   
   
       6 . The method of  claim 1 , wherein removing involves removing by chemical mechanical polishing.  
   
   
       7 . A method of fabricating a detector, said method comprising: 
 forming a trench in a substrate, said substrate having an upper surface;    forming a first semiconductor layer on the substrate and in the trench;    forming a second semiconductor layer on the first doped semiconductor layer and extending into the trench;    forming a third semiconductor layer on the second semiconductor layer and extending into the trench, wherein the second semiconductor layer absorbs light of wavelength * and the first and third semiconductor layers transmits light of wavelength;    removing deposited materials that are above a plane defined by the surface of the substrate and thereby forming an upper, substantially planar surface and exposing an upper end of the first doped layer in the trench;    forming a first electrical contact to the first semiconductor doped layer; and    forming a second electrical contact to the third semiconductor doped layer.    
   
   
       8 . The method of  claim 7 , wherein the first semiconductor layer is characterized by a conduction band located above and separated from a valence band by a first bandgap, the second semiconductor layer is characterized by a conduction band located above and separated from a valence band by a second bandgap, and the third semiconductor layer is characterized by a conduction band located above and separated from a valence band by a third bandgap, and wherein forming the second semiconductor layer involves selecting a semiconductor material for the second semiconductor layer for which the second bandgap is smaller than both the first and third bandgaps.  
   
   
       9 . The method of  claim 7 , wherein the second semiconductor layer is characterized by a conduction band located above and separated from a valence band by a bandgap, and wherein forming the second semiconductor layer involves introducing a dopant that produces deep level energy states in the bandgap between the conduction and valence bands.  
   
   
       10 - 16 . (canceled)