Differential inverter circuit

Abstract

An improved differential inverter comprising a differential inverter having a differential input for receiving a first input signal and a second input signal, said inverter further comprising a differential control input for receiving a first control signal and a second control signal. The improved differential inverter further comprises a differential output for transmitting a first output signal and a second output signal. The improved differential inverter further comprises a controlled bias generator that generates the second vector of input signals in response to a bias control signal. The control bias signal is generated at an output of a voltage divider coupled to the differential output of the differential inverter said bias control signal being indicative for a DC voltage of the of the differential output.

1 . An improved differential inverter ( 100 ) comprising a differential inverter ( 30 ) having 
 a differential input for receiving a first vector of signals comprising a first input signal (DIN 1 ) and a second input signal (DIN 2 )    a differential control input for receiving a second vector of input signals comprising a first a first control signal (DC 1 ) and a second control signal (DC 2 ),    a differential output for transmitting a third vector of differential signals comprising a first output signal (OUT 1 ) and a second output signal (OUT 2 )    said improved differential inverter ( 100 ) being characterized in that it further comprises a controlled bias generator ( 10 ) generating the second vector of input signals in response to a bias control signal (Cin) which is generated at an output of a voltage divider coupled to the differential output of the differential inverter ( 30 ) said bias control signal being indicative of a DC voltage of the of the differential output, wherein the controlled bias generator comprises a first inverter having an output that is the first control signal and a second inverter having an output that is the second control signal.    
     
     
         2 . An improved differential inverter ( 100 ) as claimed in  claim 1  wherein the bias control signal (Cin) is generated in a coupling point (P) of a first resistor means (Ros 1 ) to a second resistor means (Ros 2 ) substantially equal to the first resistor means (Ros 1 ), an end of the first resistor means (Ros 1 ) and an end of the second resistor means being coupled to the differential output.  
     
     
         3 . An improved differential inverter ( 100 ) as claimed in  claim 1  wherein the differential inverter ( 30 ) comprises a first transistor pair and a second transistor pair each of the transistor pairs comprising a n-type MOS transistor (T 2 ) coupled to a p-type MOS transistor (T 1 ) via a drain to drain connection, the n-type transistor (T 2 ) having a first control terminal (G 2 ) for receiving the second control signal (DC 2 ) via a third resistor means (R 3 ), the p-type transistor (T 1 ) having a second control terminal (G 1 ) for receiving the first control signal (DC 1 ) via a fourth resistor means (R 4 ).  
     
     
         4 . An improved differential inverter ( 100 ) as claimed in  claim 1  wherein the control bias generator ( 10 ) comprises a first CMOS inverter ( 11 ) coupled to a second CMOS inverter ( 12 ) and to a third CMOS inverter ( 13 ), the first CMOS inverter ( 11 ) receiving the bias control signal (Cin) and generating a variable control signal (VR) that is inputted to the second CMOS inverter ( 12 ) and to the third CMOS inverter ( 13 ), the second CMOS inverter ( 12 ) and the third CMOS inverter generating the second vector of input signals (DC 1 , DC 2 ) in response to the variable control signal (VR).  
     
     
         5 . An improved differential inverter ( 100 ) as claimed in  claim 4  wherein any of the CMOS inverters included in the controlled bias generator ( 10 ) comprises a pair of a p-type MOS transistor (T 1 ′) and a n-type MOS transistor (T 2 ′) said transistors being mutually coupled and having different geometrical properties A 1 ′ and A 2 ′, respectively.  
     
     
         6 . A differential oscillator ( 400 ) comprising an improved differential inverter ( 100 ) as claimed in  claim 1 , said differential oscillator having a LC tank circuit ( 401 ) coupled between the terminals of the differential output of the improved differential inverter ( 100 ), the terminals of the differential output being cross-coupled to the differential input.  
     
     
         7 . A differential inverter comprising: 
 a differential input operative to receive a first vector of signals comprising a first input signal and a second input signal;    a differential control input operative to receive a second vector of input signals comprising a first a first control signal and a second control signal;    a differential output adapted to transmit a third vector of differential signals comprising a first output signal and a second output signal; and    a controlled bias generator operative to generate the second vector of input signals in response to a bias control signal, which is generated at an output of a voltage divider coupled to the differential output of the differential inverter, wherein the bias control signal is indicative of a DC voltage of the of the differential output, wherein the controlled bias generator comprises a first inverter having an output that is the first control signal and a second inverter having an output that is the second control signal.