High density semiconductor memory and method of making

Abstract

A memory cell, array and device include cross-shaped active areas and polysilicon gate areas disposed over arm portions of adjacent cross-shaped active areas. The polysilicon gate areas couple word lines with capacitors associated with each arm portion of the cross-shaped active areas. Buried digit lines are coupled to body portions of the cross-shaped active areas. The word lines and digit lines provide a unique contact to each capacitor of the array of memory cells. Each memory cell has an area of 5 F 2 . An electronic system and method for fabricating a memory cell are also disclosed.

1 . A method of forming a plurality of memory cells on a surface of a substrate, comprising: 
 forming at least one cross-shaped active area having a plurality of arms in the substrate;    forming a like plurality of capacitors, each capacitor associated with an arm of the at least one cross-shaped active area;    disposing a polysilicon gate area over an arm of the plurality of arms;    forming a buried digit line electrically coupled to a portion of the at least one cross-shaped active area; and    forming a buried word line electrically coupled to the polysilicon gate area.    
   
   
       2 . The method of  claim 1 , wherein forming the at least one cross-shaped active area in the substrate comprises forming at least one discrete active area isolated from any other discrete active areas.  
   
   
       3 . The method of  claim 1 , wherein forming the buried digit line further comprises forming the buried digit line oriented in an orthogonal orientation with the buried word line.  
   
   
       4 . The method of  claim 1 , wherein forming the at least one cross-shaped active area comprises forming an active area of nine features (F) squared.