US2007063275A1PendingUtilityA1
Semiconductor device and method for fabricating the same
Assignee: MATSUSHITA ELECTRIC INDUSTRIAL CO LTDPriority: Oct 10, 2002Filed: Nov 21, 2006Published: Mar 22, 2007
Est. expiryOct 10, 2022(expired)· nominal 20-yr term from priority
Inventors:Taiji Noda
H10P 95/90H10P 30/21H10P 30/208H10P 30/204H10D 62/371H10D 62/314H10D 30/751H10D 30/0275H10D 30/0227H10P 30/28
50
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Claims
Abstract
Into a channel formation region of a semiconductor substrate of p-type silicon, indium ions are implanted at an implantation energy of about 70 keV and a dose of about 5×10 13 /cm 2 , thereby forming a p-doped channel layer. Next, germanium ions are implanted into the upper portion of the semiconductor substrate at an implantation energy of about 250 keV and a dose of about 1×10 16 /cm 2 , thereby forming an amorphous layer in a region of the semiconductor substrate deeper than the p-doped channel layer.
Claims
exact text as granted — not AI-modified1 - 17 . (canceled)
18 . A semiconductor device comprising:
a gate insulating film on a semiconductor substrate; a gate electrode on the gate insulating film; a diffused channel layer of a first conductivity type including a first dopant and formed below a region of the gate insulating film in the semiconductor substrate; and a germanium-containing layer formed in a region deeper than the diffused channel layer in the semiconductor substrate.
19 . The semiconductor device of claim 18 ,
wherein the diffused channel layer contains germanium.
20 . The semiconductor device of claim 19 ,
wherein the diffused channel layer has a lower dopant concentration of germanium than the first dopant.
21 . The semiconductor device of claim 18 ,
wherein the first dopant includes heavy ions with a large mass number.
22 . The semiconductor device of claim 18 ,
wherein the first dopant includes indium.
23 . The semiconductor device of claim 18 ,
wherein an interface between the gate insulating film and the semiconductor substrate has a higher dopant concentration of germanium than a lower side of the diffused channel layer.
24 . The semiconductor device of claim 18 ,
wherein a dopant concentration of germanium contained in an interface between the gate insulating film and the semiconductor substrate is about 5×10 18 to 5×10 21 atoms/cm 3 and the dopant concentration of germanium contained in a lower side of the diffused channel layer is about 1×10 15 to 1×10 17 atoms/cm 3 .
25 . The semiconductor device of claim 18 ,
wherein a region of the diffused channel layer slightly deeper than a surface of the semiconductor substrate has a higher dopant concentration of the first dopant than the surface of the semiconductor substrate.
26 . The semiconductor device of claim 18 , further comprising:
sidewalls formed on side surfaces of the gate electrode; and diffused extension layers of a second conductivity type including a second dopant and formed below the sidewalls in the semiconductor substrate, wherein the diffused extension layers contain germanium.
27 . The semiconductor device of claim 26 , further comprising:
diffused pocket layers of the first conductivity type including the first dopant and formed below the diffused extension layers in the semiconductor substrate, wherein the diffused pocket layers have a higher dopant concentration of the first dopant than the diffused channel layer.
28 . The semiconductor device of claim 26 , further comprising:
heavily diffused extension layers of a second conductivity type including a third dopant, formed below a side region of the sidewalls in the semiconductor substrate, connected to the diffused extension layers and having a junction deeper than the diffused extension layers, wherein the heavily diffused extension layers contain germanium.
29 . The semiconductor device of claim 28 ,
wherein the germanium-containing layer is formed to a region deeper than the heavily diffused extension layers.
30 . The semiconductor device of claim 18 ,
wherein the plane orientation of the semiconductor substrate is the { 100 } plane.
31 . The semiconductor device of claim 18 ,
wherein the semiconductor substrate comprises silicon.
32 . The semiconductor device of claim 18 ,
wherein the semiconductor substrate includes, in the upper portion thereof, an epitaxial layer formed by epitaxially growing silicon.
33 . The semiconductor device of claim 18 ,
wherein the semiconductor substrate includes, in the upper portion thereof, a strained silicon layer having a crystal lattice of a larger lattice constant than a normal lattice constant.
34 . The semiconductor device of claim 18 ,
wherein the semiconductor substrate includes: a buffer layer containing silicon germanium and formed in the upper portion of the semiconductor substrate; and a strained silicon layer formed on the buffer layer.Join the waitlist — get patent alerts
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