Method for forming semiconductor film, method for manufacturing semiconductor device and electrooptic device, apparatus for performing the same, and semiconductor device and electrooptic device

Abstract

An object of the present invention is to provide a method for easily forming a polycrystalline semiconductor thin-film, such as polycrystalline silicon having high crystallinity and high quality, or a single crystalline semiconductor thin-film at inexpensive cost, the crystalline semiconductor thin-film having a large area, and to provide an apparatus for processing the method described above. In forming a polycrystalline (or single crystalline) semiconductor thin-film ( 7 ), such as a polycrystalline silicon thin-film, having high crystallinity and a large grain size on a substrate ( 1 ), or in forming a semiconductor device having the polycrystalline (or single crystalline) semiconductor thin-film ( 7 ) on the substrate ( 1 ), a method comprises forming a low-crystallization semiconductor thin-film ( 7 A) on the substrate ( 1 ), and subsequently heating and cooling this low-crystallization semiconductor thin-film ( 7 A) to a fusion, a semi-fusion, or a non-fusion state by flash lamp annealing to facilitate the crystallization of the low-crystallization semiconductor thin-film, whereby a polycrystalline (single crystalline) semiconductor thin-film ( 7 ) is obtained. A method for forming the semiconductor device and an apparatus for processing the methods are also disclosed.

1 . (canceled)  
   
   
       2 . A method for forming a polycrystalline or a single crystalline semiconductor thin-film on a substrate, comprising: 
 forming a low-crystallization semiconductor thin-film on the substrate; and    heating and cooling the low-crystallization semiconductor thin-film to a state selected from the group consisting of a fusion, a semi-fusion, and a non-fusion by flash lamp annealing.    
   
   
       3 . A method according to  claim 2 , wherein the forming a low-crystallization semiconductor thin-film and the heating and cooling the low-crystallization semiconductor thin-film are repeated.  
   
   
       4 . A method according to  claim 2 , wherein the low-crystallization semiconductor thin-film contains at least one Group IV element.  
   
   
       5 . A method according to  claim 2 , wherein the low-crystallization semiconductor thin-film is converted into a polycrystalline semiconductor thin-film having a large grain size or a single crystalline semiconductor thin-film by flash lamp annealing.  
   
   
       6 . A method according to  claim 1  or  2 , further comprising: 
 forming a recess portion provided with a step having a predetermined size and dimensions in a predetermined element-forming region-on the substrate;    wherein, 
 the low-crystallization semiconductor thin-film, which optionally comprises at least Group IV element, is formed on the substrate including the recess portion; and  
   performing graphoepitaxial growth with the bottom corner portion of the step as a seed by the flash lamp annealing.    
   
   
       7 . A method according to  claim 2 , further comprising: forming a layer in a predetermined element-forming region on the substrate 
 wherein,    the layer comprises a material having good lattice matching properties with a single crystalline semiconductor;    the low-crystallization semiconductor thin-film, which optionally comprises at least one Group IV element, is formed on said layer; and    performing heteroepitaxial growth by flash lamp annealing with the material layer as a seed.    
   
   
       8 . A method according to  claim 2 , wherein said forming a low-crystallization semiconductor thin-film on the substrate and said heating and cooling the low-crystallization semiconductor thin-film are continuously or sequentially performed in an integrated apparatus in which at least said forming and said heating and cooling are performed.  
   
   
       9 . A method according to  claim 3 , further comprising, before the flash lamp annealing is again performed, processing the polycrystalline semiconductor thin-film or the single crystalline semiconductor thin-film with one or more hydrogen-based active species, 
 wherein, 
 said hydrogen-based active species are generated by plasma discharge or catalytic reaction of hydrogen or a hydrogen-containing gas; and  
 the flash lamp annealing is performed after the low-crystallization semiconductor thin-film is formed.  
   
   
   
       10 . A method according to  claim 2 , wherein the flash lamp annealing is performed in a hydrogen atmosphere under a reduced pressure, in a hydrogen-containing gas atmosphere under a reduced pressure, or in a vacuum.  
   
   
       11 . A method according to  claim 2 , wherein the substrate is heated to a strain point thereof or less in the flash lamp annealing.  
   
   
       12 . A method according to  claim 2 , wherein the flash lamp annealing is performed by a simultaneous flash emission in which an entire large area is simultaneously processed by at least one flash emission, a scanning emission in which flash emission is scanned at least once for the same area, or a step and/or repeat emission in which flash emission is performed at least once while the substrate is moved in a step and/or a repeat manner relatively with respect to the flash emission light.  
   
   
       13 . A method according to  claim 2 , wherein the flash lamp annealing is carried out with a light source selected from the group consisting of a xenon lamp, a xenon-mercury lamp, a xenon-krypton lamp, a krypton lamp, a krypton-mercury lamp, a xenon-krypton-mercury lamp and a metal halide lamp.  
   
   
       14 . A method according to  claim 2 , wherein emission light from a lamp used for the flash lamp annealing is controlled at least to have a wavelength in the ultraviolet ray region, and when necessary, the emission light is transmitted through an infrared-reducing filter or an infrared-blocking filter.  
   
   
       15 . A method according to  claim 2 , wherein a light-emitting apparatus comprising an ultraviolet source and a flash discharge mechanism is used, the flash discharge mechanism optionally controlling a peak value and a time span (pulse width) of a discharge current flowing through a flash lamp, and a repeating speed and a frequency of lamp emission in the flash lamp annealing.  
   
   
       16 . A method according to  claim 2 , wherein a flash lamp source apparatus used for the flash lamp annealing has at least a configuration selected from the group consisting of: (1) a reflecting member is provided in a housing which contains a lamp and which is at the earth potential, and when necessary, minute irregularities are formed on the surface of the reflecting member; (2) a lamp and a reflecting member are provided in a housing having shading properties, and when necessary, flash emission light is transmitted through a transparent member having infrared-reducing properties or infrared-blocking properties; (3) a lamp and a reflecting member are provided in a housing, and flash emission light reflected and condensed and flash emission light passing in the forward direction are transmitted through a condensing lens or a light homogenizer; and (4) a reflecting member and a housing are cooled by a circulating coolant.  
   
   
       17 . A method according to  claim 2 , wherein the lamp is formed as a parallel plate light-emitting tube, a pair or pairs of counter electrodes are disposed in the light-emitting tube, and between the counter electrodes, a trigger electrode thin-film or a trigger electrode assembly is provided on the external wall of the light-emitting tube for each pair of the counter electrodes.  
   
   
       18 . A method according to  claim 2 , wherein pairs of counter electrodes are provided in a straight light-emitting tube, and between the counter electrodes, a trigger electrode thin-film or a trigger electrode assembly is provided on the external wall of the light-emitting tube.  
   
   
       19 . A method according to  claim 2 , wherein a plurality of lamps is used for the flash lamp annealing, the lamps are provided in parallel in plan view, and at least two lamps are connected to each other in series and are connected to a corresponding power supply, each lamp is connected to a corresponding power supply, or the plurality of lamps is connected in series and is connected to a common power supply, whereby the plurality of lamps simultaneously emits light when being synchronously triggered.  
   
   
       20 . A method according to  claim 2 , wherein a flash lamp is accommodated in a vacuum container, and a reflecting member is fixed to the vacuum container with a vibration-absorbing material provided therebetween.  
   
   
       21 . A method according to  claim 2 , wherein a protective, insulating film is formed on the low-crystallization semiconductor thin-film, and the flash lamp annealing is performed in this state in an air or in a nitrogen atmosphere at atmospheric pressure.  
   
   
       22 . A method according to  claim 2 , wherein, when the flash lamp annealing is performed by flash emission for the low-crystallization semiconductor thin-film formed on the substrate or for the low-crystallization semiconductor thin-film covered with a protective, insulating film, flash emission is performed at the top surface side, the bottom surface side, or simultaneously at both top and bottom surface sides of the thin-film.  
   
   
       23 . A method according to  claim 22 , wherein islands are formed on the low-crystallization semiconductor thin-film or on the low-crystallization semiconductor thin-film covered with the protective, insulating film.  
   
   
       24 . A method according to  claim 22 , wherein the flash emission is performed in a nitrogen atmosphere at atmospheric pressure or in an air.  
   
   
       25 . A method according to  claim 22 , wherein the flash emission is performed in a hydrogen atmosphere under a reduced pressure, in a hydrogen-containing gas atmosphere under a reduced pressure, or in a vacuum.  
   
   
       26 . A method according to  claim 2 , wherein the flash lamp annealing is performed under the influence of a magnetic field and/or an electric field.  
   
   
       27 . A method according to  claim 2 , wherein the low-crystallization semiconductor thin-film is formed of an amorphous silicon film, an amorphous silicon film containing microcrystalline silicon, a microcrystalline silicon film, a polycrystalline silicon film containing amorphous silicon and microcrystalline silicon, an amorphous germanium film, an amorphous germanium film containing microcrystalline germanium, a microcrystalline germanium film, a polycrystalline germanium film containing amorphous germanium and microcrystalline germanium, an amorphous silicon germanium film represented by Si x Ge 1−x  (0<x<1), an amorphous carbon film, an amorphous carbon film containing microcrystalline carbon, a microcrystalline carbon film, a polycrystalline carbon film containing amorphous carbon and microcrystalline carbon, an amorphous silicon carbide film represented by Si x C 1−x  (0<x<1), and an amorphous gallium arsenide film represented by Ga x As 1−x  (0<x<1).  
   
   
       28 . A method according to  claim 2 , wherein at least one of the group consisting of a channel, a source, a drain region of a thin-film insulating gate type field effect transistor, a diode, a wire, a resistor, a capacitor, and an electron-emitting element is formed from the polycrystalline or the single crystalline semiconductor thin-film.  
   
   
       29 . A method according to  claim 28 , wherein the flash lamp annealing is performed after the low-crystallization semiconductor thin-film is patterned for forming at least of the group consisting of the channel, the source, the drain regions, the diode, the resistor, the capacitor, the wire and the electron-emitting element.  
   
   
       30 . A method according to  claim 2 , wherein the thin-film is manufactured for a silicon semiconductor device, a silicon semiconductor integrated circuit device, a silicon-germanium semiconductor device, a silicon-germanium semiconductor integrated circuit device, a III-V and II-VI compound semiconductor device, a II-V and II-VI compound semiconductor integrated circuit device, a silicon carbide semiconductor device, a silicon carbide semiconductor integrated circuit device, a polycrystalline or a single crystalline diamond semiconductor device, a polycrystalline or a single crystalline diamond semiconductor integrated circuit device, a liquid crystal display device, an organic or an inorganic electroluminescent (EL) device, a field emission display (FED) device, a light-emitting polymer display device, a light-emitting diode display device, a CCD area/linear sensor device, a CMOS sensor device and a solar cell device.  
   
   
       31 . A method according to  claim 30 , wherein, when a semiconductor device, an electrooptic display device, a solid-state image sensing device, each having an internal circuit and a peripheral circuit, is manufactured, a channel, a source, and a drain region of a thin-film insulating gate type field effect transistor constituting at least one of these circuits are formed from the polycrystalline or the single crystalline semiconductor thin-film.  
   
   
       32 . A method according to  claim 31 , wherein a cathode or an anode connected to the drain or the source of the thin-film insulating gate type field effect transistor is provided under each of organic or inorganic electroluminescent layers for individual colors.  
   
   
       33 . A method according to  claim 32 , wherein a device is formed in which active elements including the thin-film insulating gate type field effect transistor and a diode are also covered with the cathode, or in which the cathode or the anode is provided on and between the individual organic or inorganic electroluminescent layers for individual colors so as to cover the entire surface.  
   
   
       34 . A method according to  claim 32 , wherein a black mask layer is formed between the organic or inorganic electroluminescent layers for individual colors.  
   
   
       35 . A method according to  claim 31 , wherein an emitter of a field emission display device is connected to the drain of the thin-film insulating gate type field effect transistor via the polycrystalline or the, single crystalline semiconductor thin-film and is formed from an n-type polycrystalline semiconductor film or polycrystalline diamond film, a carbon thin-film which may or may not contain nitrogen, a number of protruding structures formed on a surface of a carbon thin-film which may or may not contain nitrogen, or the like, the films being formed on the polycrystalline or the single crystalline semiconductor thin-film.  
   
   
       36 . A method according to  claim 35 , wherein a metal shielding film at the earth potential is formed above active elements including the thin-film insulating gate type field effect transistor and a diode with an insulating film provided therebetween.  
   
   
       37 . A method according  claim 36 , wherein the metal shielding film is formed of the same material and in the same step as those of a gate lead electrode of the field emission display device.  
   
   
       38 - 71 . (canceled)