Structure and method for thin single or multichip semiconductor QFN packages
Abstract
A semiconductor device ( 100 ) has one or more semiconductor chips ( 110 ) with active and passive surfaces, wherein the active surfaces include contact pads. The device further has a plurality of metal segments ( 111 ) separated from the chip by gaps ( 120 ); the segments have first and second surfaces, wherein the second surfaces ( 111 b ) are coplanar ( 130 ) with the passive chip surface ( 101 b ). Conductive connectors span from the chip contact pads to the respective first segment surface. Polymeric encapsulation compound ( 150 ) covers the active chip surface, the connectors, and the first segment surfaces, and are filling the gaps so that the compound forms surfaces coplanar ( 130 ) with the passive chip surface and the second segment surfaces. In this structure, the device thickness may be only about 250 μm. Reflow metals may be on the passive chip surface and the second segment surfaces.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a semiconductor chip having an active and a passive surface, the active surface including contact pads; a plurality of metal segments separated from the chip by gaps, the segments having first and second surfaces, the second surfaces being coplanar with the passive chip surface; conductive connectors spanning from the chip contact pads to the first surface of the respective segment; and polymeric encapsulation compound covering the active chip surface, the connectors, and the first segment surfaces, and filling the gaps so that the compound forms surfaces coplanar with the passive chip surface and the second segment surfaces.
2 . The device according to claim 1 further comprising reflow metals on the passive chip surface and the second segment surfaces.
3 . The device according to claim 1 further comprising more than one semiconductor chip.
4 . The device according to claim 1 further comprising at least one passive component.
5 . A semiconductor device comprising:
a plurality of metal segments separated by gaps, the segments having first and second surfaces, the first surfaces suitable for attaching semiconductor chips or conductive connectors, the second surfaces being coplanar; a semiconductor chip having active and passive surfaces, the active surface including contact pads, the passive surface attached to a metal segment; conductive connectors spanning from the chip contact pads to the first surface of the respective segment; and polymeric encapsulation compound covering the active chip surface, the connectors, and the first segment surfaces, and filling the gaps so that the compound forms surfaces coplanar with the second segment surfaces.
6 . The device according to claim 5 further comprising reflow metals the second segment surfaces.
7 . The device according to claim 5 further comprising more than one semiconductor chip.
8 . The device according to claim 5 further comprising at least one passive component.
9 . A method for fabricating semiconductor devices comprising the steps of:
providing a metal sheet having first and second surfaces; etching selected portions of the first sheet surface so that the etched portions become gaps having a certain depth and selected lengths and widths between un-etched metal segments, the segments suitable for attaching metal connectors; providing semiconductor chips having contact pads; attaching each chip in a gap of suitable length and width; interconnecting the chip contact pads with respective segments using conductive connectors; covering the first sheet surface including the assembled chips and connectors, and filling the remaining gaps, with a polymeric compound; and removing metal of the second sheet surface until the certain depth of the gaps is reached, thereby electrically isolating the segments from each other and creating a planar device surface.
10 . The method according to claim 9 further comprising the step of continuing the removing process until a predetermined thickness of the segments and the chips is reached.
11 . The method according to claim 9 further comprising the step of attaching reflow metals to the chips and segments exposed at the planar device surface to prepare for solder attachment of the device to external parts.
12 . The method according to claim 9 wherein the step of removing uses a rotating grinding wheel under controlled rotation speeds, without grinding powder.
13 . A method for fabricating semiconductor devices comprising the steps of:
providing a metal sheet having first and second surfaces; etching selected portions of the first sheet surface so that the etched portions become gaps having a certain depth and selected lengths and widths between un-etched metal segments, the segments suitable for attaching semiconductor chips or metal connectors; providing semiconductor chips having contact pads; attaching each chip on a segment of suitable length and width; interconnecting the chip contact pads with respective segments using conductive connectors; covering the first sheet surface including the assembled chips and connectors, and filling the gaps, with a polymeric compound; and removing metal from the second sheet surface until the certain depth of the gaps is reached, thereby electrically isolating the segments from each other and creating a planar device surface.
14 . The method according to claim 13 further comprising the step of continuing the removing process until a predetermined thickness of the segments is reached.
15 . The method according to claim 13 further comprising the step of attaching reflow metals to the segments exposed at the planar device surface to prepare for solder attachment of the device to external parts.
16 . The method according to claim 13 wherein the step of removing uses a rotating grinding wheel under controlled rotation speeds, without grinding powder.Cited by (0)
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