US2007138546A1PendingUtilityA1

Semiconductor device

Assignee: TOSHIBA KKPriority: Dec 15, 2005Filed: Dec 7, 2006Published: Jun 21, 2007
Est. expiryDec 15, 2025(expired)· nominal 20-yr term from priority
H10D 64/117H10D 62/127H10D 62/104H10D 84/83H10D 62/116H10D 62/111H10D 30/668H10D 30/0297H10D 8/00H10D 30/665
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Claims

Abstract

A semiconductor device includes: a semiconductor layer, a first semiconductor region provided on a major surface of the semiconductor layer, a second semiconductor region provided in a surface portion of the first semiconductor region, a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor layer, a first insulating film provided on an inner wall of the trench, a third semiconductor region filling the trench below an interface between the semiconductor layer and the first semiconductor region, a second insulating film provided on the third semiconductor region, a gate electrode filling the trench above the second insulating film. A portion of the first insulating film in contact with the semiconductor layer is opened. The semiconductor layer is in contact with the third semiconductor region through the opened portion.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising: 
 a semiconductor layer of a first conductivity type;    a first semiconductor region of a second conductivity type provided on a major surface of the semiconductor layer;    a second semiconductor region of the first conductivity type provided in a surface portion of the first semiconductor region;    a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor layer;    a first insulating film provided on an inner wall of the trench;    a third semiconductor region of the second conductivity type filling the trench below an interface between the semiconductor layer and the first semiconductor region;    a second insulating film provided on the third semiconductor region;    a gate electrode filling the trench above the second insulating film;    a first main electrode connected to the second semiconductor region; and    a second main electrode provided on a side opposite to the major surface of the semiconductor layer,    wherein a portion of the first insulating film in contact with the semiconductor layer is opened, and the semiconductor layer is in contact with the third semiconductor region through the opened portion.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein the third semiconductor region is connected to the first main electrode.  
   
   
       3 . The semiconductor device according to  claim 2 , wherein a portion of the third semiconductor region fills the trench from the bottom of the trench up to the second semiconductor region, and the third semiconductor region has a surface portion in contact with the first main electrode.  
   
   
       4 . The semiconductor device according to  claim 3 , wherein the surface portion of the third semiconductor region has a higher dopant concentration than the other portion of the third semiconductor region.  
   
   
       5 . The semiconductor device according to  claim 1 , further comprising a back gate region connected to the first main electrode is selectively provided on the first semiconductor region, the back gate region having a higher dopant concentration than the first semiconductor region.  
   
   
       6 . The semiconductor device according to  claim 1 , wherein the opening of the first insulating film is provided at the bottom of the trench.  
   
   
       7 . A semiconductor device comprising: 
 a semiconductor layer of a first conductivity type;    a first semiconductor region of a second conductivity type provided on a major surface of the semiconductor layer;    a second semiconductor region of the first conductivity type provided in a surface portion of the first semiconductor region;    a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor layer;    a first insulating film provided on an inner wall of the trench, a portion of the first insulating film in contact with the semiconductor layer having an opening;    a third semiconductor region of the second conductivity type filling the trench below an interface between the semiconductor layer and the first semiconductor region and being in contact with the semiconductor layer through the opening formed in the portion of the first insulating film;    a second insulating film provided on the third semiconductor region;    a gate electrode filling the trench above the second insulating film;    a first main electrode connected to the second semiconductor region;    a second main electrode provided on a side opposite to the major surface of the semiconductor layer;    a plurality of terminal semiconductor regions of the second conductivity type filling terminal trenches and juxtaposed with the semiconductor layer being interposed therebetween, the terminal trenches being formed in the semiconductor layer in a terminal section outside a device section in which the gate electrode, the first semiconductor region, and the second semiconductor region are formed; and    an interlayer insulating film provided adjacent to an outermost semiconductor region of the plurality of terminal semiconductor regions and buried on the major surface side of the semiconductor layer.    
   
   
       8 . The semiconductor device according to  claim 7 , wherein the terminal semiconductor region forms a junction with the semiconductor layer at the bottom of the trench.  
   
   
       9 . The semiconductor device according to  claim 7 , wherein the terminal semiconductor region is connected to the first main electrode.  
   
   
       10 . The semiconductor device according to  claim 7 , wherein the surface portion of the terminal semiconductor region is in contact with the first main electrode.  
   
   
       11 . The semiconductor device according to  claim 10 , wherein the surface portion of the terminal semiconductor region has a higher dopant concentration than the other portion of the terminal semiconductor region.  
   
   
       12 . The semiconductor device according to  claim 7 , further comprising a contact region connected to the first main electrode is provided on the semiconductor layer interposed between the terminal trenches.  
   
   
       13 . The semiconductor device according to  claim 7 , wherein the dopant concentration in the outermost semiconductor region is made lower than the dopant concentration in the terminal semiconductor region on the device section side.  
   
   
       14 . A semiconductor device comprising: 
 a semiconductor layer of a first conductivity type;    a first semiconductor region of a second conductivity type provided on a major surface of the semiconductor layer;    a second semiconductor region of the first conductivity type provided in a surface portion of the first semiconductor region;    a trench extending through the second semiconductor region and the first semiconductor region to the semiconductor layer;    a gate insulating film provided on an inner wall of the trench;    a gate electrode filling the trench via the gate insulating film;    a first main electrode connected to the second semiconductor region;    a second main electrode provided on a side opposite to the major surface of the semiconductor layer;    a plurality of terminal semiconductor regions of the second conductivity type filling terminal trenches and juxtaposed with the semiconductor layer being interposed therebetween, the terminal trenches being formed in the semiconductor layer in a terminal section outside a device section in which the gate electrode, the first semiconductor region, and the second semiconductor region are formed; and    an interlayer insulating film provided adjacent to an outermost semiconductor region of the plurality of terminal semiconductor regions and buried on the major surface side of the semiconductor layer.    
   
   
       15 . The semiconductor device according to  claim 14 , wherein the terminal semiconductor region forms a junction with the semiconductor layer at the bottom of the trench.  
   
   
       16 . The semiconductor device according to  claim 14 , wherein the terminal semiconductor region is connected to the first main electrode.  
   
   
       17 . The semiconductor device according to  claim 14 , wherein the surface portion of the terminal semiconductor region is in contact with the first main electrode.  
   
   
       18 . The semiconductor device according to  claim 17 , wherein the surface portion of the terminal semiconductor region has a higher dopant concentration than the other portion of the terminal semiconductor region.  
   
   
       19 . The semiconductor device according to  claim 14 , further comprising a contact region connected to the first main electrode is provided on the semiconductor layer interposed between the terminal trenches.  
   
   
       20 . The semiconductor device according to  claim 14 , wherein the dopant concentration in the outermost semiconductor region is made lower than the dopant concentration in the terminal semiconductor region on the device section side.

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