Pixel structure with improved charge transfer

Abstract

An active pixel is described comprising a semiconductor substrate and a radiation sensitive source of carriers in the substrate, such as for instance, a photodiode. A non-carrier storing, carrier collecting region in the substrate is provided for attracting carriers from the source as they are generated. At least one doped or inverted region of a first conductivity is provided in or on the substrate for storing the carriers before read-out. At least one non-carrier storing, planar current flow, carrier transport pathway is provided from or through the carrier collecting region to the at least one doped or inverted region to transfer the carriers without intermediate storage to the read-out electronics.

1 . A pixel array comprising at least one set of pixels of a first sensitivity and at least a second set of pixels of a second sensitivity, the first and second sensitivities being different from each other.  
   
   
       2 . A pixel array comprising a plurality of pixel structures, each pixel structure comprising: 
 a photosensitive element for converting radiation into charge carriers;    a carrier storing element;    a first switch located in-between said photosensitive element and said carrier storing element; and    said photosensitive element also being connected to a voltage with a reset switch; and    the pixel array further comprising:    a timing circuit for resetting all the pixels of the array simultaneously.    
   
   
       3 . A pixel array according to  claim 2 , wherein the carrier storing element of at least one pixel is an analog memory element such as a capacitor or a parasitic capacitor.  
   
   
       4 . A pixel array according to  claim 2 , wherein each pixel is MOS-based.  
   
   
       5 . A pixel array according to  claim 2 , further comprising an amplifier connected to each carrier storing element.  
   
   
       6 . A pixel array according to  claim 5 , wherein an amplifier is located within at least one pixel structure to have an active pixel.  
   
   
       7 . A pixel array according to  claim 5 , wherein an amplifier is placed outside at least one pixel structure to obtain a passive pixel.  
   
   
       8 . A pixel array comprising a plurality of pixels, each pixel comprising: 
 a photosensitive element for converting radiation into charge carriers;    a carrier storing element;    a first switch located in-between said photosensitive element and said carrier storing element; and    said photosensitive element also being connected to a voltage with a reset switch;    and the pixel array further comprising: 
 a timing circuit for simultaneously opening the first switches of all the pixels of the array simultaneously.  
   
   
   
       9 . A pixel array according to  claim 8 , wherein the carrier storing element of at least one pixel is an analog memory element such as a capacitor or a parasitic capacitor.  
   
   
       10 . A pixel array according to  claim 8 , wherein each pixel is MOS-based.  
   
   
       11 . A pixel array according to  claim 8 , further comprising an amplifier connected to each carrier storing element.  
   
   
       12 . A pixel array according to  claim 11 , wherein an amplifier is located within at least one pixel structure to have an active pixel.  
   
   
       13 . A pixel array according to  claim 11 , wherein an amplifier is placed outside at least one pixel structure to obtain a passive pixel.  
   
   
       14 . A range pixel comprising: 
 a semiconductor substrate;    a radiation sensitive source of carriers in the substrate;    a non-carrier storing, carrier collecting region in the substrate;    at least two doped or inverted regions of a first conductivity type in or on the substrate; and    a non-carrier storing, planar current flow, carrier transport pathway from or through the carrier collecting region to each doped or inverted region.