Secure system-on-chip

Abstract

A secure system-on-chip for processing data comprises at least a central processing unit, an input and an output channel, an encryption/decryption engine and a memory, wherein said input channel comprises an input encryption module to encrypt all incoming data, said output channel comprises an output decryption module to decrypt all outgoing data, said central processing unit receiving the encrypted data from the input encryption module and storing them in the memory, and while processing the stored data, said central processing unit reading the stored data from the memory, requesting decryption of same in the encryption/decryption engine, processing the data and requesting encryption of the result by the encryption/decryption engine and storing the encrypted result, outputting the result to the output decryption module for decryption purposes and outputting the decrypted result via the output channel.

1 . A secure system-on-chip for processing data, the system-on-chip comprising, 
 at least one central processing unit;    an input channel;    an output channel;    an encryption/decryption engine; and    a memory;    wherein said input channel comprises an input encryption module to add an internal encryption layer on all incoming data, said output channel comprising an output decryption module to remove the internal encryption layer on all outgoing data, said central processing unit receiving the encrypted data from the input encryption module and storing them in the memory, and while processing the stored data, said central processing unit reading the stored data from the memory, requesting the removal of the internal encryption layer of same in the encryption/decryption engine, processing the data and requesting encryption of the result by the encryption/decryption engine so as to add the internal encryption layer and storing the encrypted result, outputting the result to the output decryption module for removing the internal encryption layer and outputting the result via the output channel.    
   
   
       2 . The secure system-on-chip according to  claim 1 , wherein the input encryption module is a virtual module which pass the data to be encrypted to the encryption/decryption engine while adding the internal encryption layer.  
   
   
       3 . The secure system-on-chip according to  claim 1 , wherein the input encryption module is a virtual module which pass the data to decrypted to the encryption/decryption engine while removing the internal encryption layer.  
   
   
       4 . The secure system-on-chip according to  claim 1 , wherein the algorithm to encrypt and decrypt the data is a symmetrical algorithm.  
   
   
       5 . The secure system-on-chip according to  claim 4 , wherein the encryption/decryption algorithm uses a set of initialization constants and all or part of the initialization constants are randomly generated within the system-on-chip.  
   
   
       6 . The secure system-on-chip according to  claim 1 , wherein the algorithm to encrypt and decrypt the data is an asymmetrical algorithm.  
   
   
       7 . The secure system-on-chip according to  claim 1 , wherein it comprises means to generate randomly the key or key pair used by the encryption/decryption engine.  
   
   
       8 . The secure system-on-chip according to  claim 1 , wherein the input encryption module as well as the output decryption module comprises several encryption or decryption units respectively, at least one of these units being loaded with a key which is non-volatile and at least one of these units being loaded with a permanent key.  
   
   
       9 . The secure system-on-chip according to  claim 1 , further comprising an autonomous supervision module which is preprogrammed with normal working conditions definitions of at least the input and/or output data flow, and means to disable the input and/or output channel if the current conditions exceed the normal conditions definitions.  
   
   
       10 . The secure system-on-chip according to  claim 9 , wherein the normal working conditions definition comprises a duration in which the supervision module comprises means to define a time window during which the input or out channel is allowed to receive or send data.  
   
   
       11 . The secure system-on-chip according to  claim 9 , wherein the normal working conditions definition comprises a duration in which the supervision module disables the input and/or output channel after the reception of a block of data.  
   
   
       12 . The secure system-on-chip according to  claim 9 , wherein the supervision module comprises means to receive the state condition of the central processing unit, and means to enable or disable the output channel according to the central processing unit state.  
   
   
       13 . The secure system-on-chip according to  claim 1 , wherein the encryption/decryption operations can be executed on one single data or a set of data at a time.