Method of fabricating flash memory device and flash memory device fabricated thereby

Abstract

There are provided a method of fabricating a flash memory device and a flash memory device fabricated thereby. The method of fabricating a flash memory device includes forming an isolation layer defining an active region in a semiconductor substrate, wherein the isolation layer is formed to have a protrusion being higher than a top surface of the active region, and to provide a groove in the active region. A conductive layer pattern is formed in the groove. A buffer layer is formed on the semiconductor substrate having the conductive layer pattern. Then, an oxidation barrier layer pattern having a line shape opening across the active region is formed on the buffer layer. The buffer layer and an upper portion of the conductive layer pattern, which are exposed by the opening, are selectively oxidized to form a mask oxide layer at a cross region of the opening and the active region, and simultaneously to form a buffer oxide layer on the isolation layer adjacent to the mask oxide layer. The oxidation barrier layer pattern is removed. Using the mask oxide layer, the buffer oxide layer and the isolation layer as etch masks, the buffer layer and the conductive layer pattern are etched, so as to form a floating gate on the active region.

1 . A flash memory device comprising: 
 an isolation layer disposed in a semiconductor substrate to define an active region, wherein the isolation layer has a protrusion being higher than a surface of the semiconductor substrate, to provide a groove in the active region;    a floating gate disposed in the groove to have a recessed upper surface;    a mask oxide layer disposed on the floating gate, being aligned to the floating gate; and    a buffer oxide layer disposed on the isolation layer with connected to the mask oxide layer.    
   
   
       2 . The flash memory device according to  claim 1 , wherein the floating gate is a polysilicon layer.  
   
   
       3 . The flash memory device according to  claim 1 , wherein the mask oxide layer and the buffer oxide layer are polysilicon oxide layers.  
   
   
       4 . The flash memory device according to  claim 1 , further comprising a gate oxide layer interposed at least between the floating gate and the semiconductor substrate of the active region.  
   
   
       5 . The flash memory device according to  claim 1 , further comprising: 
 an inter-gate dielectric layer at least covering sidewalls of the floating gate; and    a control gate disposed across the active region, to overlap at least one side portion of the floating gate.