Method and Apparatus for Converting Globally Clock-Gated Circuits to Locally Clock-Gated Circuits
Abstract
A method for converting globally clock-gated circuits to locally clock-gated circuits is disclosed. A timing analysis is initially performed on an integrated circuit (IC) design to generate a slack time report for all globally clock-gated circuits within the IC design. Based on their respective slack time indicated in the slack time report, all globally clock-gated circuits that should be connected to locally generated clocks are identified. After disconnecting from a global clock tree, each of the identified globally clock-gated circuits is subsequently connected to a locally generated clock having a clock delay comparable to its slack time indicated in the slack time report.
Claims
exact text as granted — not AI-modified1 . A method for converting globally clock-gated circuits to locally clock-gated circuits within in integrated circuit design, said method comprising:
identifying globally clock-gated circuits that change state infrequently; and converting said identified globally clock-gated circuits to corresponding locally clock-gated circuits.
2 . The method of claim 1 , wherein said method further includes assigning said identified globally clock-gated circuits to a plurality of group according to their slack time indicated in a slack time report.
3 . The method of claim 2 , wherein said method further includes providing said identified globally clock-gated circuit with respective locally generated clocks having a clock delay comparable to their slack time indicated in said slack time report.
4 . The method of claim 1 , wherein said method further includes performing a timing analysis on said integrated circuit design after said identified globally clock-gated circuits has been connected to said respective locally generated clocks.
5 . The method of claim 1 , wherein said method further includes determining whether or not a globally clock-gated circuit should be converted to a locally clock-gated circuit.
6 . The method of claim 5 , wherein said determining further includes utilizing a logic circuit netlist, a switching factor, and a switching factor threshold to determine whether or not a globally clock-gated circuit should be converted to a locally clock-gated circuit.Join the waitlist — get patent alerts
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