Trench capacitor and fabrication method thereof

Abstract

A method of fabricating trench capacitors is provided. A plurality of trenches is formed in the substrate by performing a patterning process with a patterned mask layer on a substrate. A bottom electrode is formed in the substrate of the surface of the trench. A portion of the patterned mask layer is removed so as to expose a portion of the substrate at two sides of the top of the trench. A capacitor dielectric layer is formed on the substrate and the surface of the trench. A conductive layer is formed over the substrate. The conductive layer is at least filled into the trench and covers the capacitor dielectric layer. The patterned mask layer and a portion of the conductive layer are removed and the portion of the conductive layer which covers the capacitor dielectric layer is reserved as to form a top electrode.

1 . A method of fabricating a trench capacitor, comprising: 
 performing a patterning process to a substrate by using a patterned mask layer over the substrate to form a plurality of trenches;    forming a bottom electrode in the substrate of surfaces of the trenches;    removing a portion of the patterned mask layer to expose a portion of the substrate at two sides of a top of each of the trenches;    forming a capacitor dielectric layer over the substrate and the surfaces of the trenches;    forming a conductive layer over the substrate, the conductive layer at least filling the trenches and covering the capacitor dielectric layer; and    removing the patterned mask layer and a portion of the conductive layer; and    maintaining a portion of the conductive layer, which covers the capacitor dielectric layer to form a top electrode.    
   
   
       2 . The method of fabricating a trench capacitor of  claim 1 , wherein a method of removing the portion of the patterned mask layer to expose the portion of the substrate at the two sides of the top of each of the trenches comprises an isotropic etch method.  
   
   
       3 . The method of fabricating a trench capacitor of  claim 1 , after the top electrode is formed further comprising forming an isolation structure in the conductive layer, the capacitor dielectric layer and a portion of the substrate between two neighboring trenches.  
   
   
       4 . The method of fabricating a trench capacitor of  claim 3 , wherein the isolation structure comprises a shallow trench isolation (STI) structure.  
   
   
       5 . The method of fabricating a trench capacitor of  claim 1 , wherein the capacitor dielectric layer comprises a high-k dielectric material layer.  
   
   
       6 . The method of fabricating a trench capacitor of  claim 5 , wherein a material of the high-k dielectric material layer comprises silicon oxide/silicon nitride/silicon nitride (ONO), silicon nitride/silicon oxide (NO), tantalum oxide (Ta 2 O 5 ), zirconium oxide (ZrO 2 ), hafnium oxide (HfO 2 ), or barium strontium titanate (BST).  
   
   
       7 . The method of fabricating a trench capacitor of  claim 1 , wherein a method of forming the capacitor dielectric layer comprises a chemical vapor deposition (CVD) method or a sputtering method.  
   
   
       8 . The method of fabricating a trench capacitor of  claim 1 , wherein the patterned mask layer comprises, sequentially over the substrate, a patterned pad oxide layer and a patterned silicon nitride layer.  
   
   
       9 . The method of fabricating a trench capacitor of  claim 1 , wherein a material of the conductive layer comprises doped polysilicon.  
   
   
       10 . The method of fabricating a trench capacitor of  claim 1 , wherein a method of forming the conductive layer comprises a CVD method.  
   
   
       11 . The method of fabricating a trench capacitor of  claim 1 , wherein the bottom electrode comprises a doped region.  
   
   
       12 . The method of fabricating a trench capacitor of  claim 1 , wherein a method of forming the bottom electrode comprises an ion implantation method or a thermal diffusion method.  
   
   
       13 . A trench capacitor disposed in a trench of a substrate, the trench capacitor comprising: 
 a bottom electrode, disposed in the substrate of a surface of the trench;    a capacitor dielectric layer, disposed over the surface of the trench and over a portion of the substrate at two sides of a top of the trench;    a top electrode, disposed in the trench and over the substrate, the top electrode covering the capacitor dielectric layer; and    an isolation structure, disposed in portions of the capacitor dielectric layer, the top electrode, and the substrate.    
   
   
       14 . The trench capacitor of  claim 13 , wherein the capacitor dielectric layer comprises a high-k dielectric material layer.  
   
   
       15 . The trench capacitor of  claim 14 , wherein a material of the high-k dielectric material layer comprises silicon oxide/silicon nitride/silicon nitride (ONO), a silicon nitride/silicon oxide (NO), tantalum oxide (Ta 2 O 5 ), zirconium oxide (ZrO 2 ), hafnium oxide (HfO 2 ), or barium strontium titanate (BST).  
   
   
       16 . The trench capacitor of  claim 13 , wherein the top electrode comprises a conductive layer.  
   
   
       17 . The trench capacitor of  claim 16 , wherein a material of the conductive layer comprises doped polysilicon.  
   
   
       18 . The trench capacitor of  claim 13 , wherein the bottom electrode comprises a doped region.  
   
   
       19 . The trench capacitor of  claim 13 , wherein the isolation structure comprises an STI structure.