Circuit and method for adjusting threshold drift over temperature in a CMOS receiver

Abstract

A receiver for use in a device such as a memory device is provided. The receiver circuit is located on the same integrated circuit as a temperature sensor (or other sensor). A data receiver and strobe receiver are coupled to the temperature sensor. A latch receives a data input from the data receiver and this data input is latched based upon the strobe receiver. In the preferred embodiment, the timing of these inputs is controlled, at least in part, by the temperature sensor output.

1 . A receiver circuit comprising: 
 a sensor including an output for carrying a signal with a value related to a temperature of the receiver circuit;    a data receiver with an input coupled to a data input node, the data receiver including a control input coupled to the output of the sensor;    a first latch with an input coupled to an output of the data receiver;    a second latch with an input coupled to the output of the data receiver;    a strobe receiver with an input coupled to a strobe input node, the strobe receiver including a control input coupled to the output of the temperature sensor, the strobe receiver also including an output coupled to a control input of the first latch and to a control input of the second latch.    
     
     
         2 . The circuit of  claim 1  wherein the sensor comprises a temperature sensor.  
     
     
         3 . The circuit of  claim 1  and further comprising a driver coupled between the output of the strobe receiver and the control inputs of the first and second latches.  
     
     
         4 . The circuit of  claim 1  and further comprising a delay element coupled between the output of the data receiver and the inputs of the first and second latches.  
     
     
         5 . The circuit of  claim 1  wherein the data receiver comprises a CMOS receiver and the strobe receiver comprises a CMOS receiver.  
     
     
         6 . The circuit of  claim 4  wherein the data receiver comprises: 
 a first transistor with a current path coupled between a first voltage node and the output of the data receiver, the first transistor including a gate coupled to the data input node;    a second transistor with a current path coupled between a second voltage node and the output of the data receiver, the second transistor including a gate coupled to the data input node;    a third transistor with a current path coupled between the second voltage node and the output of the data receiver, the third transistor including a gate coupled to the data input node; and    a switch with a current path coupled between the current path of the third transistor and the output of the data receiver, the switch being turned on and off in response the signal carried on the output of the temperature sensor.    
     
     
         7 . The circuit of  claim 5  wherein the first transistor comprises an n-channel transistor and the first voltage node is coupled to a ground potential and wherein the second and third transistors comprise p-channel transistors and the second voltage node is coupled to a VDD potential.  
     
     
         8 . The circuit of  claim 5  wherein the first transistor comprises a p-channel transistor and the first voltage node is coupled to a VDD potential and wherein the second and third transistors comprise n-channel transistors and the second voltage node is coupled to a ground potential.  
     
     
         9 . The circuit of  claim 5  and further comprising: 
 a fourth transistor with a current path coupled between the second voltage node and the output node, the fourth transistor including a gate coupled to the input node; and    a second switch with a current path coupled between the current path of the fourth transistor and the output node, the second switch being turned on or off in response to a second indication to adjust a threshold voltage of the receiver circuit    
     
     
         10 . The circuit of  claim 5  and further comprising: 
 a fourth transistor with a current path coupled between the first voltage node and the output node, the fourth transistor including a gate coupled to the input node; and    a second switch with a current path coupled between the current path of the fourth transistor and the output node, the second switch being turned on or off in response to a second indication to adjust a threshold voltage of the receiver circuit.    
     
     
         11 . A double data rate synchronous dynamic random access memory device comprising: 
 an array of memory cells arranged in rows and columns, each memory cell including a pass transistor coupled in series with a storage capacitor;    a row decoder coupled to the array;    a column decoder coupled to the array;    a clock receiver coupled to receive an external clock signal, the clock signal being used to derive a signal coupled to at least one of the row decoder or the column decoder;    a temperature sensor including an output for carrying a signal with a value related to a temperature of the memory device;    a data receiver with an input coupled to a data input node, the data receiver including a control input coupled to the output of the temperature sensor;    a first latch with an input coupled to an output of the data receiver;    a second latch with an input coupled to the output of the data receiver;    a strobe receiver with an input coupled to a strobe input node, the strobe receiver including a control input coupled to the output of the temperature sensor, the strobe receiver also including an output coupled to a control input of the first latch and to a control input of the second latch.    
     
     
         12 . The device of  claim 11  wherein the first latch retains data received at a rising edge of a strobe signal and the second latch retains data received at a falling edge of the strobe signal.  
     
     
         13 . The device of  claim 11  wherein the data receiver comprises a CMOS receiver and the strobe receiver comprises a CMOS receiver.  
     
     
         14 . The circuit of  claim 12  wherein the data receiver comprises: 
 a first transistor with a current path coupled between a first voltage node and the output of the data receiver, the first transistor including a gate coupled to the data input node;    a second transistor with a current path coupled between a second voltage node and the output of the data receiver, the second transistor including a gate coupled to the data input node;    a third transistor with a current path coupled between the second voltage node and the output of the data receiver, the third transistor including a gate coupled to the data input node; and    a switch with a current path coupled between the current path of the third transistor and the output of the data receiver, the switch being turned on and off in response the signal carried on the output of the temperature sensor.