US2007236377A1PendingUtilityA1

Digital-to-analog converter

32
Assignee: CHEN JIANZHONGPriority: Dec 23, 2004Filed: Aug 31, 2006Published: Oct 11, 2007
Est. expiryDec 23, 2024(expired)· nominal 20-yr term from priority
H03M 3/424H03M 3/502H03M 3/464H03M 3/368H03M 3/338
32
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Embodiments of a digital-to-analog converter are disclosed.

Claims

exact text as granted — not AI-modified
1 . An apparatus comprising: 
 a digital-to-analog converter (DAC);    said DAC having a feedback path that includes an accumulator to employ spectral shaping in connection with dynamic element matching and a differentiator to substantially offset said accumulator.    
   
   
       2 . The apparatus of  claim 1 , wherein said DAC comprises a sigma-delta modulator.  
   
   
       3 . The apparatus of  claim 2 , wherein said sigma-delta modulator comprises a multi-bit sigma-delta modulator.  
   
   
       4 . The apparatus of  claim 1 , wherein said DAC comprises a low-pass DAC.  
   
   
       5 . The apparatus of  claim 1 , wherein said DAC comprises a band-pass DAC.  
   
   
       6 . The apparatus of  claim 1 , wherein said DAC comprises a high-pass DAC.  
   
   
       7 . An apparatus comprising: 
 a digital-to-analog converter (DAC);    said DAC having a feedback path comprising means for applying spectral shaping to dynamic element matching and means for substantially offsetting said spectral shaping.    
   
   
       8 . The apparatus of  claim 7 , wherein said DAC comprises a sigma-delta modulator.  
   
   
       9 . A method comprising: 
 spectrally shaping a signal prior to application to randomizing logic; and    substantially offsetting the spectral shaping prior to application of said signal as feedback.    
   
   
       10 . The method of  claim 9 , wherein said randomized logic is employed to perform dynamic element matching for a digital-to-analog converter.  
   
   
       11 . The method of  claim 9 , wherein said spectral shaping comprises an order higher than one.  
   
   
       12 . The method of  claim 11 , wherein said order higher than one comprises an order higher than two.  
   
   
       13 . A lowpass sigma-delta modulator comprising: 
 a summing circuit for receiving an input and a feedback signal and producing an output;    a loop filter receiving the output of said summing circuit as an input and producing an output;    a quantizer receiving the output of said loop filter and producing an N-bit digital output which is the output of said modulator, N being an integer with a value greater than one;    a digital integrator receiving the output of said quantizer as an input and producing an output;    a randomizer block receiving the output of said digital integrator as an input and produce an output;    a digital-to-analog converter receiving said output of said randomizer block as an input and producing an output;    an analog differentiator receiving the output of said digital-to-analog converter as an input and producing said feedback signal.    
   
   
       14 . A lowpass sigma-delta modulator comprising: 
 a summing circuit for receiving an input and a feedback signal and producing an output;    a loop filter receiving the output of said summing circuit as an input and producing an output;    a quantizer receiving the output of said loop filter and producing an N-bit digital output which is the output of said modulator, N being an integer with a value greater than one;    a digital L th -order lowpass filter receiving the output of said quantizer as an input and producing an output, L being an integer with a value greater than zero;    a randomizer block receiving the output of said digital L th -order lowpass filter as an input and produce an output;    a digital-to-analog converter receiving said output of said randomizer block as an input and producing an output;    an analog L th -order highpass filter receiving the output of said digital-to-analog converter as an input and producing said feedback signal, L being an integer with a value greater than zero.    
   
   
       15 . A bandpass sigma-delta modulator comprising: 
 a summing circuit for receiving an input and a feedback signal and producing an output;    a loop filter receiving the output of said summing circuit as an input and producing an output;    a quantizer receiving the output of said loop filter and producing an N-bit digital output which is the output of said modulator, N being an integer with a value greater than one;    a digital L th -order bandpass filter receiving the output of said quantizer as an input and producing an output, L being an integer with a value greater than zero;    a randomizer block receiving the output of said digital L th -order bandpass filter as an input and produce an output;    a digital-to-analog converter receiving said output of said randomizer block as an input and producing an output;    an analog L th -order band rejection filter receiving the output of said digital-to-analog converter as an input and producing said feedback signal, L being an integer with a value greater than zero.    
   
   
       16 . The sigma-delta modulator of  claim 15 , wherein said loop filter can be realized in either discrete-time or continuous-time circuits.  
   
   
       17 . A lowpass sigma-delta digital-to-analog converter comprising: 
 an interpolation filter for receiving an input and producing an output;    a summing circuit for receiving the output of said interpolation filter and a feedback signal and producing an output;    a loop filter receiving the output of said summing circuit as an input and producing an output;    a truncator receiving the output of said loop filter and producing said feedback signal, an N-bit truncated digital signal, N being an integer with a value greater than one;    a digital integrator receiving the output of said truncator as an input and producing an output;    a randomizer block receiving the output of said digital integrator as an input and produce an output;    a digital-to-analog converter receiving said output of said randomizer block as an input and producing an output;    an analog differentiator receiving the output of said digital-to-analog converter as an input and producing an output;    an analog post filter receiving the output of said analog differentiator and producing the output of said lowpass sigma-delta digital-to-analog converter.    
   
   
       18 . A lowpass sigma-delta digital-to-analog converter comprising: 
 an interpolation filter for receiving an input and producing an output;    a summing circuit for receiving the output of said interpolation filter and a feedback signal and producing an output;    a loop filter receiving the output of said summing circuit as an input and producing an output;    a truncator receiving the output of said loop filter and producing said feedback signal, an N-bit truncated digital signal, N being an integer with a value greater than one;    a digital L th -order lowpass filter receiving the output of said truncator as an input and producing an output, L being an integer with a value greater than zero;    a randomizer block receiving the output of said digital L th -order lowpass filter as an input and produce an output;    a digital-to-analog converter receiving said output of said randomizer block as an input and producing an output;    an analog L th -order highpass filter receiving the output of said digital-to-analog converter as an input and producing an output, L being an integer with a value greater than zero;    an analog post filter receiving the output of said analog L th -order highpass filter and producing the output of said lowpass sigma-delta digital-to-analog converter.    
   
   
       19 . A bandpass sigma-delta digital-to-analog converter comprising: 
 an interpolation filter for receiving an input and producing an output;    a summing circuit for receiving the output of said interpolation filter and a feedback signal and producing an output;    a loop filter receiving the output of said summing circuit as an input and producing an output;    a truncator receiving the output of said loop filter and producing said feedback signal, an N-bit truncated digital signal, N being an integer with a value greater than one;    a digital L th -order bandpass filter receiving the output of said truncator as an input and producing an output, L being an integer with a value greater than zero;    a randomizer block receiving the output of said digital L th -order bandpass filter as an input and produce an output;    a digital-to-analog converter receiving said output of said randomizer block as an input and producing an output;    an analog L th -order band rejection filter receiving the output of said digital-to-analog converter as an input and producing an output, L being an integer with a value greater than zero;    an analog post filter receiving the output of said analog L th -order band rejection filter and producing the output of said bandpass sigma-delta digital-to-analog converter.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.