Double-sided monolithically integrated optoelectronic module with temperature compensation

Abstract

An optoelectronic module includes a semiconductor structure with a substrate having a first side and a second side, a first layered structure deposited on the first side, and a second layered structure deposited on the second side. The optoelectronic module also includes driver circuitry fabricated of the first layered structure and a diode laser fabricated of the second layered structure. The driver circuitry produces a drive electrical signal supplied to the diode laser, and the diode laser produces an optical output in response to the drive electrical signal. In a preferred embodiment, the optoelectronic module also includes a temperature-sensitive element fabricated of the first or the second layered structure. The temperature-sensitive element produces a temperature dependent control signal related to the diode laser temperature.

1 . An optoelectronic module comprising: 
 a) a semiconductor structure comprising: 
 i) a substrate having a first side and a second side;  
 ii) a first layered structure deposited on the first side of the substrate; and  
 iii) a second layered structure deposited on the second side of the substrate;  
   b) a driver circuitry fabricated from the first layered structure; and    c) a diode laser fabricated from the second layered structure;    wherein the driver circuitry produces a drive electrical signal supplied to the diode laser; and    wherein the diode laser produces an optical output in response to the drive electrical signal.    
     
     
         2 . The optoelectronic module of  claim 1  further comprising a temperature-sensitive element fabricated from the first layered structure, wherein the temperature-sensitive element produces a temperature dependent control signal related to the diode laser temperature; wherein the drive electrical signal is varied in response to the temperature dependent control signal such that the optical output is nearly temperature independent in a certain interval of temperatures.  
     
     
         3 . The optoelectronic module of  claim 2 , wherein the optical output varies by less than +/−5%.  
     
     
         4 . The optoelectronic module of  claim 2 , wherein the interval of temperatures is at least a 50° C. interval.  
     
     
         5 . The optoelectronic module of  claim 2 , wherein the optical output varies by less than +/−4%.  
     
     
         6 . The optoelectronic module of  claim 2 , wherein the interval of temperatures is at least a 60° C. interval.  
     
     
         7 . The optoelectronic module of  claim 2  wherein the drive electrical signal is a DC bias current and a modulation current acting simultaneously.  
     
     
         8 . The optoelectronic module of  claim 7  wherein the driver circuitry, in response to the temperature dependent control signal, changes a magnitude of a bias signal and an amplitude of a modulation signal.  
     
     
         9 . The optoelectronic module of  claim 1  further comprising a temperature-sensitive element fabricated from the second layered structure, wherein the temperature-sensitive element produces a temperature dependent control signal being in a known relation with the diode laser temperature; wherein the drive electrical signal is varied in response to the temperature dependent control signal in such a manner that the optical output is nearly temperature independent in a certain interval of temperatures.  
     
     
         10 . The optoelectronic module of  claim 9 , wherein the optical output varies by less than +/−5%.  
     
     
         11 . The optoelectronic module of  claim 9 , wherein the interval of temperatures is at least a 50° C. interval.  
     
     
         12 . The optoelectronic module of  claim 9 , wherein the optical output varies by less than +/−4%.  
     
     
         13 . The optoelectronic module of  claim 9 , wherein the interval of temperatures is at least a 60° C. interval.  
     
     
         14 . The optoelectronic module of  claim 9  wherein the drive electrical signal is a DC bias current and a modulation current acting simultaneously.  
     
     
         15 . The optoelectronic module of  claim 14  wherein the driver circuitry, in response to the temperature dependent control signal, changes a magnitude of a bias signal and an amplitude of a modulation signal.  
     
     
         16 . The optoelectronic module of  claim 1  wherein the substrate is a semi-insulating semiconductor substrate and the second layered structure comprises a conductive buffer layer.  
     
     
         17 . The optoelectronic module of  claim 16 , wherein the buffer layer is thicker than 1 micrometer.  
     
     
         18 . The optoelectronic module of  claim 17 , wherein the buffer layer is thicker than 2 micrometers.  
     
     
         19 . The optoelectronic module of  claim 16  wherein the driver circuitry is based on III-V field-effect transistors.  
     
     
         20 . The optoelectronic module of  claim 1  wherein the diode laser is a vertical cavity surface emitting laser.  
     
     
         21 . The optoelectronic module of  claim 1  wherein the driver circuitry is electrically connected to the diode laser by at least one via-hole conductive path made through the substrate.  
     
     
         22 . The optoelectronic module of  claim 1  wherein the drive electrical signal is a DC bias current and a modulation current acting simultaneously.  
     
     
         23 . The optoelectronic module of  claim 1 , wherein the substrate is a double-sided epi-ready substrate made of a III-V semiconductor material.  
     
     
         24 . A method of fabricating an optoelectronic module comprising a substrate having a first side and a second side, comprising the steps of: 
 a) depositing a first layered structure on the first side of the substrate;    b) depositing a protective film on the first layered structure;    c) depositing a second layered structure on the second side of the substrate; and    d) removing the protective film;    wherein the conditions of step a) and step b) are selected such that the second side of the substrate remains stable during these steps; and    wherein the protective film is selected such that it protects the first layered structure from degradation during step c).    
     
     
         25 . The method of  claim 24 , wherein step d) further comprises the substep of selectively etching the protective film off of the first layered structure.  
     
     
         26 . The method of  claim 25 , wherein the substep of selectively etching the protective film comprises at least two rounds of selective etching such that the protective film is completely removed.  
     
     
         27 . The method of  claim 24 , wherein the protective film protects the first layered structure against decomposition, erosion and other destructive processes which can be caused by high-temperature treatment during step c).  
     
     
         28 . The method of  claim 24 , wherein the substrate is a double-sided epi-ready substrate made of a III-V semiconductor material.  
     
     
         29 . The method of  claim 24 , further comprising, between steps c) and d), the step of forming a diode laser from the second layered structure.  
     
     
         30 . The method of  claim 29 , further comprising, after step d), the step of forming driver circuitry from the first layered structure.  
     
     
         31 . The method of  claim 24 , further comprising, between steps c) and d), the step of forming a temperature-sensitive element from the second layered structure.  
     
     
         32 . The method of  claim 24 , further comprising, after step d), the step of forming driver circuitry from the first layered structure.  
     
     
         33 . The method of  claim 24 , further comprising, after step d), the step of forming a temperature-sensitive element from the first layered structure.  
     
     
         34 . The method of  claim 24 , further comprising, after step d), the step of forming at least one via-hole to electrically connect the first layered structure and the second layered structure.  
     
     
         35 . The method of  claim 34 , wherein the step of forming at least one via-hole comprises the substeps of: 
 i) forming at least one metal layer on the first side of the substrate and at least one metal layer on the second side of the substrate wherein one of the metal layers has an opening in a location intended for via-hole formation;    ii) forming at least one resist layer on each side of the substrate such that all of the metal layers are covered with the resist layers except at the opening;    iii) forming a part-through hole on the side of the substrate that is opposite the opening;    iv) transforming the part-through hole into a via-hole permeating the substrate;    v) forming at least one undercut profile;    vi) depositing a plurality of metal atoms on one side of the substrate and on side walls of the via-hole, wherein the substrate is rotated and the substrate is inclined with respect to a flux of the metal atoms, wherein the inclination angle is selected such that at least half a depth of the via-hole is covered with the metal atoms;    vii) depositing a plurality of metal atoms on the other side of the substrate and on side walls of the via-hole, wherein the substrate is rotated and the substrate is inclined with respect to a flux of metal atoms, wherein the inclination angle is selected such that the side walls of the via-hole are completely covered with the metal atoms; and    viii) removing the resist layer and the metal atoms overlaying the resist layer.    
     
     
         36 . The method of  claim 35 , wherein the part-through hole formed in substep iii) is formed by mechanical thinning.  
     
     
         37 . The method of  claim 35 , wherein the part-through hole is transformed into a via-hole in substep iv) by dry etching through the opening.  
     
     
         38 . The method of  claim 35 , wherein the undercut profile in substep v) is formed by wet etching.  
     
     
         39 . The method of  claim 34 , wherein the step of forming at least one via-hole comprises the substeps of: 
 i) forming at least one metal layer on the first side of the substrate and at least one metal layer on the second side of the substrate wherein each metal layer has an opening located on two opposite sides of the substrate opposite each other in a place intended for via-hole formation;    ii) forming at least one resist layer such that all of the metal layers are covered with the resist layer except at the openings;    iii) forming a part-through hole on one side of the substrate;    iv) transforming the part-through hole into a via-hole permeating the substrate;    v) forming at least one undercut profile;    vi) depositing a plurality of metal atoms on one side of the substrate and on side walls of the via-hole, wherein the substrate is rotated and the substrate is inclined with respect to a flux of the metal atoms, wherein the inclination angle is selected such that at least half a depth of the via-hole is covered with the metal atoms;    vii) depositing a plurality of metal atoms on another side of the substrate and on side walls of the via-hole, wherein the substrate is rotated and the substrate is inclined with respect to a flux of metal atoms, wherein the inclination angle is selected such that the side walls of the via-hole are completely covered with metal atoms; and    viii) removing the resist layers and the metal atoms overlaying the resist layers.    
     
     
         40 . The method of  claim 39 , wherein the part-through hole in substep iii) is formed by dry etching through the opening on one side of the substrate.  
     
     
         41 . The method of  claim 39 , wherein the part-through hole is transformed into a via hole in substep iv) by dry etching through the opening on a side of the substrate opposite the part-through hole.  
     
     
         42 . The method of  claim 39 , wherein the undercut profile in substep v) is formed by wet etching.  
     
     
         43 . The method of  claim 24 , wherein the driver circuitry is based on III-V field-effect transistors.  
     
     
         44 . The method of  claim 24 , wherein the diode laser is a vertical cavity surface emitting laser.  
     
     
         45 . An optoelectronic module comprising: 
 a) a semiconductor structure comprising: 
 i) a substrate having a first side and a second side;  
 ii) a first layered structure deposited on the first side of the substrate; and  
 iii) a second layered structure deposited on the second side of the substrate;  
   b) a driver circuitry fabricated from the first layered structure; and    c) a diode laser array fabricated from the second layered structure;    wherein the driver circuitry produces a drive electrical signal supplied to the diode laser array; and    wherein the diode laser array produces an optical output in response to the drive electrical signal.    
     
     
         46 . The optoelectronic module of  claim 45 , wherein the diode laser array comprises an array of vertical cavity surface emitting lasers.  
     
     
         47 . The optoelectronic module of  claim 45 , wherein the optoelectronic module is part of a multichannel optoelectronic transmitter.