Method of Forming a Transistor Having a Dual Layer Dielectric

Abstract

Embodiments of methods, apparatuses, components, and/or systems for forming transistor having a dual layer dielectric are described.

1 - 33 . (canceled)  
   
   
       34 . An apparatus, comprising: 
 at least one thin film transistor (TFT) having:    a substrate;    a channel layer disposed over at least a portion of the substrate, wherein said channel layer comprises zinc indium oxide, and wherein said channel layer comprises at least a first surface and a substantially opposing second surface;    a first portion of a dielectric layer disposed adjacent to said first surface of said channel layer, wherein said first portion of a dielectric layer comprises aluminum oxide, and wherein said first portion of a dielectric layer comprises at least a first surface, disposed adjacent to said first surface of said channel layer, and a substantially opposing second surface; and    a second portion of a dielectric layer disposed adjacent to said second surface of said first portion of a dielectric layer, wherein said second portion of a dielectric layer comprises a UV curable monomer, and wherein said second portion of a dielectric layer comprises at least a first surface, disposed adjacent to said second surface of said first portion of a dielectric layer, and a substantially opposing second surface.    
   
   
       35 . The apparatus of  claim 34 , and further comprising: 
 a source and a drain electrode disposed adjacent to and electrically coupled with said channel layer, and    a gate electrode disposed adjacent to and electrically coupled with said second surface of said second portion of a dielectric layer.    
   
   
       36 . The apparatus of  claim 35 , wherein one or more of said source electrode, said drain electrode and/or said gate electrode substantially comprises indium tin oxide.  
   
   
       37 . The apparatus of  claim 34 , wherein said TFT comprises a flexible TFT.  
   
   
       38 . The apparatus of  claim 34 , wherein said TFT is substantially transparent.  
   
   
       39 . The apparatus of  claim 35 , wherein at least a portion of said source and drain electrodes, said channel layer, said first portion of a dielectric layer, said second portion of a dielectric layer and/or said gate electrode are formed by use of one or more low temperature processes.  
   
   
       40 . The apparatus of  claim 39 , wherein said one or more low temperature processes are substantially performed within a range of temperature less than approximately 300 degrees Celsius.  
   
   
       41 . The apparatus of  claim 39 , wherein one or more low temperature processes include: vacuum deposition, including RF sputtering, DC sputtering, reactive sputtering, atomic layer deposition (ALD), and evaporation; and one or more solution processes.  
   
   
       42 . The apparatus of  claim 41 , wherein said solution processes comprise one or more of the following processes: ejection, including thermal and piezo ejection, contact printing, screen printing, dip coating, spray coating, screen printing, chemical bath deposition, and successive ionic layer absorption and reaction.  
   
   
       43 . The apparatus of  claim 34 , wherein said first portion of a dielectric layer is disposed by use of one or more sputtering processes, including RF and DC sputtering.  
   
   
       44 . The apparatus of  claim 34 , wherein said second portion of a dielectric layer is formed by use of one or more thermal ejection processes.  
   
   
       45 . The apparatus of  claim 34 , wherein said channel layer substantially comprises zinc indium oxide having a Zn:In atomic ratio approximately within the range of about 1:1 to about 1:8.  
   
   
       46 . The apparatus of  claim 34 , wherein said channel layer substantially comprises zinc indium oxide having a Zn:In atomic ratio approximately within the range of about 1:3 to about 1:5.  
   
   
       47 . The apparatus of  claim 34 , wherein said substrate comprises one or more of: plastics and/or one or more organic substrate materials, including polyimides (PI), polyethylene terephthalates (PET), polyethersulfones (PES), polyetherimides (PEI), polycarbonates (PC), polyethylenenaphthalates (PEN), acrylics including polymethylmethacrylates (PMMA), and combinations thereof, one or more inorganic materials, including silicon, silicon dioxide, one or more types of glass, stainless steel, metal foils, including foils of aluminum and copper, and combinations thereof.  
   
   
       48 . An apparatus, comprising: 
 means for forming a thin film transistor (TFT) having a substrate, at least one channel layer, a plurality of electrodes, and a dielectric layer having a first portion and a second portion, wherein said channel layer substantially comprises zinc indium oxide, at least a portion of said electrodes substantially comprise indium tin oxide, said first portion of a dielectric layer substantially comprises one or more oxides, and said second portion of a dielectric layer substantially comprises one or more UV curable monomers.    
   
   
       49 . The apparatus of  claim 48 , wherein said means for forming a TFT comprises a means for forming a flexible TFT.  
   
   
       50 . The apparatus of  claim 48 , wherein at least a portion of said source and drain electrodes, said channel layer, said first portion of a dielectric layer, said second portion of a dielectric layer and/or said gate electrode includes means for forming at a low temperature.  
   
   
       51 . The apparatus of  claim 50 , wherein said means for forming at a low temperature is substantially performed within a range of temperature less than approximately 300 degrees Celsius.  
   
   
       52 . The apparatus of  claim 51 , wherein said means for forming at a low temperature include one or more of: vacuum deposition, including RF sputtering, DC sputtering, reactive sputtering, atomic layer deposition (ALD), and evaporation; and one or more means for solution processing.  
   
   
       53 . The apparatus of  claim 52 , wherein said one or more means for solution processing comprise one or more of the following: ejection, including thermal and piezo ejection, contact printing, screen printing, dip coating, spray coating, screen printing, chemical bath deposition, and successive ionic layer absorption and reaction.  
   
   
       54 . The apparatus of  claim 48 , wherein said first portion of a dielectric layer is disposed by use of one or more sputtering processes, including RF and DC sputtering.  
   
   
       55 . The apparatus of  claim 48 , wherein said second portion of a dielectric layer is formed by use of one or more thermal ejection processes.  
   
   
       56 . The apparatus of  claim 48 , wherein said channel layer substantially comprises zinc indium oxide having a Zn:In atomic ratio approximately within the range of about 1:1 to about 1:8.  
   
   
       57 . The apparatus of  claim 48 , wherein said channel layer substantially comprises zinc indium oxide having a Zn:In atomic ratio approximately within the range of about 1:3 to about 1:5.  
   
   
       58 . The apparatus of  claim 48 , wherein said first portion of a dielectric layer comprises one or more of: AlO x , SiO x , SiN x , SiO x N y , ZrO x , TaO x , HfO x  and combinations thereof.  
   
   
       59 . The apparatus of  claim 48 , wherein said substrate comprises one or more of the following: plastics and/or one or more organic substrate materials, including polyimides (PI), polyethylene terephthalates (PET), polyethersulfones (PES), polyetherimides (PEI), polycarbonates (PC), polyethylenenaphthalates (PEN), acrylics including polymethylmethacrylates (PMMA), and combinations thereof, one or more inorganic materials, including silicon, silicon dioxide, one or more types of glass, stainless steel, metal foils, including foils of aluminum and copper, and combinations thereof.  
   
   
       60 . The apparatus of  claim 59 , wherein said wherein said means for forming a TFT comprises a means for forming a substantially transparent TFT.  
   
   
       61 - 74 . (canceled)