US2008010475A1PendingUtilityA1

Display drive control device, for which drive method, electronics device and semiconductor integrated circuit

Assignee: MORITA SHINPriority: Jul 23, 2003Filed: Aug 30, 2007Published: Jan 10, 2008
Est. expiryJul 23, 2023(expired)· nominal 20-yr term from priority
G09G 3/3696G09G 2330/026G06F 1/263G09G 2330/02G02F 1/133G09G 3/36
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Claims

Abstract

It is aimed at being capable of easily changing a power supply startup procedure and complying with various display devices. A power supply circuit is provided between an instruction register of a liquid crystal driver and a powersupply unit. The power supply unit is not directly supplied with a setting value registered to the instruction register from a microprocessor unit. The microprocessor unit writes setting values to the instruction register without need for the time axis. To turn on the power, the time is measured inside the power supply sequencer. Set values are sequentially input to the power supply unit. The instruction register should be also capable of registering an input timing.

Claims

exact text as granted — not AI-modified
1 - 25 . (canceled)  
   
   
       26 . A semiconductor integrated circuit comprising: 
 a plurality of first registers which register a plurality of setting values for controlling a power supply circuit to generate a plurality of voltages in order to display an image on a display device comprising a plurality of pixels disposed in a matrix; and    a power supply sequencer which operates based on said plurality of first registers,    wherein said power supply sequencer outputs a signal to generate said plurality of voltages at a specified time interval in a time-sharing manner and controls said power supply circuit based on setting values registered to registers including said plurality of first registers.    
   
   
       27 . The semiconductor integrated circuit according to  claim 26 , comprising: 
 first setup means for setting a timing to validate setting values registered to said plurality of first registers.    
   
   
       28 . The semiconductor integrated circuit according to  claim 26 , comprising: 
 second setup means for determining whether or not to use said power supply sequencer; and    third setup means for starting and stopping sequence control of said power supply sequencer.    
   
   
       29 . The semiconductor integrated circuit according to  claim 27 , comprising: 
 a plurality of second registers to set a timing to validate setting values registered to said plurality of first registers,    wherein said plurality of second registers determine said specified time interval.    
   
   
       30 . The semiconductor integrated circuit according to  claim 29 , comprising: 
 a plurality of third registers to set a power supply state before validation of setting values registered to said plurality of first registers; and    a fourth register to determine whether or not to provide said plurality of third registers with setting values registered to said plurality of first registers.    
   
   
       31 . The semiconductor integrated circuit according to  claim 29 , wherein said power supply sequencer comprises: 
 a frame counter to count frame frequencies of said display device so as to set a timing to validate setting values registered to said plurality of first registers;    a comparator to compare setting values registered to said plurality of second registers with a count value in said frame counter; and    selection means for selecting any of setting values registered to said plurality of first registers and setting values registered to said plurality of third registers based on comparison outputs from said comparator.    
   
   
       32 . The semiconductor integrated circuit according to  claim 28 , comprising: 
 a fifth register to register a setting value for determining whether or not to use said power supply sequencer;    a sixth register to register a setting value for determining whether or not to perform an operation of said power supply sequencer; and    a seventh register to register a setting value for determining a termination time for an operation of said power supply sequencer.    
   
   
       33 . The semiconductor integrated circuit according to  claim 29 , 
 wherein said semiconductor integrated circuit includes a driver control circuit,    wherein said driver control circuit includes said power supply sequencer, and    wherein said power supply control circuit controls said semiconductor integrated circuit and, based on a setting value registered to each register, generates a signal to generate said plurality of voltages in a time-sharing manner by controlling said power supply sequencer and said power supply circuit.

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