US2008012603A1PendingUtilityA1

Brown out detector

Assignee: WADHWA SANJAY KPriority: Jul 17, 2006Filed: Jul 17, 2006Published: Jan 17, 2008
Est. expiryJul 17, 2026(expired)· nominal 20-yr term from priority
H03K 2217/0036G01R 19/16552G06F 1/32H03K 17/223H03K 17/302H03K 19/00315G06F 1/24G06F 1/28
35
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Claims

Abstract

A brown out detector includes a first resistive element connected to a first voltage and a first node. A capacitor is connected to the first node and a second voltage. The detector also includes a second transistor and a third transistor. The second transistor has a drain connected to a second node, a source connected to the first node, and a gate connected to the first voltage. The third transistor has a source connected to the second voltage and the capacitor, a drain connected to the second node, and a gate connected to the first voltage. The detector also includes a latch having an input connected to the second node and a detector output, which generates a reset signal when the first voltage is less than a detection threshold voltage.

Claims

exact text as granted — not AI-modified
1 . A brown out detector, comprising: 
 a first resistive element connected to a first voltage and a first node;    a capacitor connected to the first node and a second voltage;    a second transistor having a drain connected to a second node, a source connected to the first node, and a gate connected to the first voltage;    a third transistor having a source connected to the second voltage, a drain connected to the second node, and a gate connected to the first voltage; and    a latch having an input connected to the second node and a detector output, wherein the detector output comprises a reset signal when the first voltage is less than a detection threshold voltage.    
     
     
         2 . The brown out detector of  claim 1 , wherein the first resistive element is a first transistor having a source connected to the first voltage, a drain connected to the first node, and a gate connected to the first node.  
     
     
         3 . The brown out detector of  claim 2 , wherein the latch comprises: 
 a first inverter having an input connected to the second node and an output connected to a third node, wherein the third node is the detector output; and    a second inverter having an input connected to the third node and an output connected to the second node.    
     
     
         4 . The brown out detector of  claim 2 , wherein the first voltage is not connected to the second voltage when the first voltage is greater than the detection threshold voltage.  
     
     
         5 . The brown out detector of  claim 2 , wherein the detection threshold voltage is less than between about 75% of the first voltage, when the first voltage is full.  
     
     
         6 . The brown out detector of  claim 2 , wherein the first transistor is one of a PMOS diode connected transistor and a NMOS diode connected transistor.  
     
     
         7 . The brown out detector of  claim 6 , wherein the third transistor is a NMOS transistor.  
     
     
         8 . The brown out detector of  claim 2 , wherein the first voltage is about 1.2V when the first voltage is full and the capacitor has a value of about 20 pF.  
     
     
         9 . A brown out detector, comprising: 
 a first resistive element connected to a first voltage and a first node;    a capacitor connected to the first node and a second voltage;    a second transistor having a drain connected to a second node, a source connected to the first node, and a gate connected to the first voltage;    a third transistor having a source connected to the second voltage, a drain connected to the second node, and a gate connected to the first voltage;    a fourth transistor having a source connected to the second voltage, a drain connected to a first detector output, and a gate connected to the second node; and    a fifth transistor having a drain connected to a second detector output, a source connected to the first node, and a gate connected to the first voltage, wherein the first detector output and the second detector output generate a reset signal when the first voltage is less than a detection threshold voltage.    
     
     
         10 . The brown out detector of  claim 9 , wherein the first resistive element is a first transistor having a source connected to the first voltage.  
     
     
         11 . The brown out detector of  claim 10 , wherein the first voltage is not connected to the second voltage when the first voltage is greater than the detection threshold voltage.  
     
     
         12 . The brown out of  claim 10 , wherein the first transistor has a gate connected to the first voltage and a drain connected to the first node.  
     
     
         13 . The brown out detector of  claim 10 , wherein the first transistor has a gate connected to the first node and a drain connected to the first node.  
     
     
         14 . The brown out detector of  claim 10 , further comprising a sixth transistor having a source connected to the second voltage, a drain connected to a fourth detector output, and a gate connected to the second node.  
     
     
         15 . The brown out detector of  claim 14 , further comprising a seventh transistor having a drain connected to a third detector output, a source connected to the first node, and a gate connected to the first voltage.  
     
     
         16 . The brown out detector of  claim 10 , wherein the detection threshold voltage is less than about 75% of the first voltage when the first voltage is full.  
     
     
         17 . A method for generating a reset signal when a first voltage is less than a detection threshold voltage, comprising: 
 detecting the first voltage, wherein when the first voltage is greater than a detection threshold voltage, the first voltage is not connected to a second voltage;    determining whether the first voltage is less than the detection threshold voltage; and    generating the reset signal if the first voltage is less than the detection threshold voltage.    
     
     
         18 . The method for generating a reset signal of  claim 17 , wherein the detection threshold voltage is less than about 75% of the first voltage when the first voltage is full.  
     
     
         19 . The method for generating a reset signal of  claim 18 , wherein the first voltage is about 1.2V when the first voltage is full and the detection threshold voltage less than about 0.9V.  
     
     
         20 . The method for generating a reset signal of  claim 19 , wherein the first voltage is about 1.4V during dynamic frequency voltage scaling.

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