Managing multi-component data

Abstract

Multi-component data is managed. Pixel image data is stored in a machine readable memory device. The pixel image data is decomposed into multiple colorspace components. The multiple colorspace components are stored in one continuous machine-readable memory segment of a machine-readable memory. The machine-readable memory has one or more burst boundaries.

1 - 24 . (canceled)  
     
     
         25 . A processing device for managing pixel image data in a plurality of memory bursts, the processing device comprising: 
 a first circuit for retrieving and storing the pixel image data comprising a plurality of colorspace components, wherein each colorspace component is one of three different types, and wherein one type of colorspace component is stored in each memory burst; and    a second circuit for copying the plurality of colorspace components from the memory bursts.    
     
     
         26 . The processing device of  claim 25 , wherein the plurality of memory bursts are in volatile memory.  
     
     
         27 . The processing device of  claim 26 , wherein the volatile memory comprises dynamic random access memory.  
     
     
         28 . The processing device of  claim 26 , wherein the volatile memory comprises static random access memory.  
     
     
         29 . The processing device of  claim 25 , wherein the colorspace components comprise luminance, red difference sample, and blue difference sample.  
     
     
         30 . The processing device of  claim 25 , wherein the colorspace components comprise a red color level, a green color level, and a blue color level.  
     
     
         31 . The processing device of  claim 25 , wherein the pixel image data comprises a first data byte, the first data byte being registered at a memory address immediately following a boundary of a memory burst in the plurality of memory bursts.  
     
     
         32 . The processing device of  claim 25 , wherein the pixel image data comprises a first data byte and subsequent data bytes, one of the subsequent data bytes being registered at a memory address immediately following a boundary of a memory burst in the plurality of memory bursts.  
     
     
         33 . A video processor comprising: 
 an input circuit for receiving a plurality of colorspace components, wherein each colorspace component is one of three different types;    a memory for storing the plurality of colorspace components in one continuous segment, wherein the memory comprises a plurality of bursts and one or more burst boundaries, and wherein one type of colorspace component is stored in each burst; and    an output circuit for transferring the plurality of colorspace components from the memory.    
     
     
         34 . The video processor of  claim 33 , wherein the memory comprises volatile memory.  
     
     
         35 . The video processor of  claim 34 , wherein the volatile memory comprises dynamic random access memory.  
     
     
         36 . The video processor of  claim 34 , wherein the volatile memory comprises static random access memory.  
     
     
         37 . The video processor of  claim 33 , wherein the colorspace components comprise luminance, red difference sample, and blue difference sample.  
     
     
         38 . The video processor of  claim 33 , wherein the colorspace components comprise a red color level, a green color level, and a blue color level.  
     
     
         39 . A video processing system comprising: 
 a microprocessor for controlling the reception of a plurality of colorspace components, each colorspace component in the plurality of colorspace components is one of three different types; and    a memory for storing the plurality of colorspace components in one continuous segment, the memory comprises a plurality of bursts and one or more burst boundaries, each burst in the plurality of bursts stores one type of colorspace component, wherein the microprocessor controls the transfer of the plurality of colorspace components from the memory.    
     
     
         40 . The video processing system of  claim 39 , wherein the memory comprises volatile memory.  
     
     
         41 . The video processing system of  claim 40 , wherein the volatile memory comprises dynamic random access memory.  
     
     
         42 . The video processing system of  claim 40 , wherein the volatile memory comprises static random access memory.  
     
     
         43 . The video processing system of  claim 39 , wherein the colorspace components comprise luminance, red difference sample, and blue difference sample.  
     
     
         44 . The video processing system of  claim 39 , wherein the colorspace components comprise a red color level, a green color level, and a blue color level.