Ferroelectric memory and its manufacturing method

Abstract

A ferroelectric memory includes a base member, a first dielectric layer formed above the base member, a second dielectric layer formed above the first dielectric layer, a contact hole that penetrates the first and second dielectric layers, a plug formed in the contact hole, and a barrier layer formed above the plug, and a ferroelectric capacitor formed from a lower electrode, a ferroelectric layer and an upper electrode successively laminated in a region including above the plug. The second dielectric layer has a property that is more difficult to be polished than the plug and the first dielectric layer.

1 . A method for manufacturing a ferroelectric memory, comprising: 
 (a) forming a contact hole that penetrates a first dielectric layer formed above a base member, and a second dielectric layer formed above the first dielectric layer;    (b) forming a conductive layer inside the contact hole and above the second dielectric layer;    (c) forming a plug inside the contact hole, having an upper surface at a position lower than an upper surface of the second dielectric layer, by polishing the conductive layer until the second dielectric layer is exposed;    (d) forming a barrier layer inside the contact hole and above the plug; and    (e) forming a ferroelectric capacitor by successively laminating a lower electrode, a ferroelectric layer and an upper electrode in a region including above the plug,    wherein the second dielectric layer has a property that is more difficult to be polished than the conductive layer and the first dielectric layer.    
   
   
       2 . A method for manufacturing a ferroelectric memory according to  claim 1 , further comprising forming another barrier layer along an inner surface of the contact hole before the step (b), wherein the plug is formed inside the another barrier layer in the step (c).  
   
   
       3 . A method for manufacturing a ferroelectric memory according to  claim 1 , wherein the step (c) includes a step conducted by a chemical mechanical polishing method.  
   
   
       4 . A method for manufacturing a ferroelectric memory according to  claim 1 , wherein, in the step (c), an upper portion of the conductive layer inside the contact hole is further removed by etching.  
   
   
       5 . A method for manufacturing a ferroelectric memory according to  claim 1 , further comprising forming an adhesion layer in a region including above the barrier layer, after the step (d), wherein the ferroelectric capacitor is formed above the adhesion layer in the step (e).  
   
   
       6 . A method for manufacturing a ferroelectric memory according to  claim 5 , wherein, in the step (e), the lower electrode, the ferroelectric layer and the upper electrode are successively laminated to form a laminated body, and the laminated body and the adhesion layer are patterned by a common process.