Digital baseband receiver with DC discharge and gain control circuits

Abstract

A digital baseband (DBB) receiver for receiving and processing a wireless communication signal. The DBB receiver includes at least one low noise amplifier (LNA), at least one demodulator, a direct current (DC) discharge circuit and an LNA control circuit. The LNA selectively amplifies the communication signal. The demodulator outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal from the LNA. The DC discharge circuit selectively discharges DC accumulating on at least one of the real and imaginary signal paths. The LNA control circuit turns the LNA on or off.

1 . A digital baseband (DBB) receiver for receiving and processing a wireless communication signal, the DBB receiver comprising: 
 (a) at least one demodulator which outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal;    (b) a direct current (DC) discharge circuit for selectively discharging direct current accumulating on at least one of the real and imaginary signal paths;    (c) a first high pass filter (HPF) circuit in communication with the real signal path; and    (d) a second HPF circuit in communication with the imaginary signal path,    wherein each of the first and second HPF circuits includes at least one capacitor and at least one transistor, the transistors of the first and second HPF circuits being controlled by the DC discharge circuit to selectively flush accumulated DC from the capacitors by selectively connecting an end of the capacitor to ground.    
   
   
       2 . The DBB receiver of  claim 1  further comprising: 
 (e) a DC offset and normalization compensation module in communication with the real and imaginary signal paths, wherein the DC offset and normalization compensation module controls the DC discharge circuit.    
   
   
       3 . A digital baseband (DBB) receiver for receiving and processing a wireless communication signal, the DBB receiver comprising: 
 (a) at least one demodulator which outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal;    (b) a direct current (DC) discharge circuit for selectively discharging direct current accumulating on at least one of the real and imaginary signal paths;    (c) a first high pass filter (HPF) circuit in communication with the real signal path; and    (d) a second HPF circuit in communication with the imaginary signal path,    wherein each of the first and second HPF circuits includes at least one capacitor and at least one switch, the switches of the first and second HPF circuits being controlled by the DC discharge circuit to selectively flush accumulated DC from the capacitors by selectively connecting an end of the capacitor to ground.    
   
   
       4 . The DBB receiver of  claim 3  further comprising: 
 (e) a DC offset and normalization compensation module in communication with the real and imaginary signal paths, wherein the DC offset and normalization compensation module controls the DC discharge circuit.    
   
   
       5 . A wireless transmit/receive unit (WTRU) for receiving and processing a wireless communication signal, the WTRU comprising: 
 (a) at least one demodulator which outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal;    (b) a direct current (DC) discharge circuit for selectively discharging direct current accumulating on at least one of the real and imaginary signal paths;    (c) a first high pass filter (HPF) circuit in communication with the real signal path; and    (d) a second HPF circuit in communication with the imaginary signal path,    wherein each of the first and second HPF circuits includes at least one capacitor and at least one transistor, the transistors of the first and second HPF circuits being controlled by the DC discharge circuit to selectively flush accumulated DC from the capacitors by selectively connecting an end of the capacitor to ground.    
   
   
       6 . The WTRU of  claim 5  further comprising: 
 (e) a DC offset and normalization compensation module in communication with the real and imaginary signal paths, wherein the DC offset and normalization compensation module controls the DC discharge circuit.    
   
   
       7 . A wireless transmit/receive unit (WTRU) for receiving and processing a wireless communication signal, the WTRU comprising: 
 (a) at least one demodulator which outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal;    (b) a direct current (DC) discharge circuit for selectively discharging direct current accumulating on at least one of the real and imaginary signal paths;    (c) a first high pass filter (HPF) circuit in communication with the real signal path; and    (d) a second HPF circuit in communication with the imaginary signal path,    wherein each of the first and second HPF circuits includes at least one capacitor and at least one switch, the switches of the first and second HPF circuits being controlled by the DC discharge circuit to selectively flush accumulated DC from the capacitors by selectively connecting an end of the capacitor to ground.    
   
   
       8 . The WTRU of  claim 7  further comprising: 
 (e) a DC offset and normalization compensation module in communication with the real and imaginary signal paths, wherein the DC offset and normalization compensation module controls the DC discharge circuit.    
   
   
       9 . An integrated circuit (IC) for receiving and processing a wireless communication signal, the IC comprising: 
 (a) at least one demodulator which outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal;    (b) a direct current (DC) discharge circuit for selectively discharging direct current accumulating on at least one of the real and imaginary signal paths;    (c) a first high pass filter (HPF) circuit in communication with the real signal path; and    (d) a second HPF circuit in communication with the imaginary signal path,    wherein each of the first and second HPF circuits includes at least one capacitor and at least one transistor, the transistors of the first and second HPF circuits being controlled by the DC discharge circuit to selectively flush accumulated DC from the capacitors by selectively connecting an end of the capacitor to ground.    
   
   
       10 . The IC of  claim 9  further comprising: 
 (e) a DC offset and normalization compensation module in communication with the real and imaginary signal paths, wherein the DC offset and normalization compensation module controls the DC discharge circuit.    
   
   
       11 . An integrated circuit (IC) for receiving and processing a wireless communication signal, the IC comprising: 
 (a) at least one demodulator which outputs analog real and imaginary signal components on real and imaginary signal paths, respectively, in response to receiving the communication signal;    (b) a direct current (DC) discharge circuit for selectively discharging direct current accumulating on at least one of the real and imaginary signal paths;    (c) a first high pass filter (HPF) circuit in communication with the real signal path; and    (d) a second HPF circuit in communication with the imaginary signal path,    wherein each of the first and second HPF circuits includes at least one capacitor and at least one switch, the switches of the first and second HPF circuits being controlled by the DC discharge circuit to selectively flush accumulated DC from the capacitors by selectively connecting an end of the capacitor to ground.    
   
   
       12 . The IC of  claim 11  further comprising: 
 (e) a DC offset and normalization compensation module in communication with the real and imaginary signal paths, wherein the DC offset and normalization compensation module controls the DC discharge circuit.