US2008023811A1PendingUtilityA1

Structure combining an ic integrated substrate and a carrier, and method of manufacturing such structure

Assignee: PRINCO CORPPriority: Jul 27, 2006Filed: Sep 30, 2006Published: Jan 31, 2008
Est. expiryJul 27, 2026(~0 yrs left)· nominal 20-yr term from priority
Inventors:Chih-Kuang Yang
H10P 72/7426H10P 72/74H10D 86/0214H10D 86/60H10D 86/40H05K 3/46
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Claims

Abstract

The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The IC integrated substrate has a first dielectric layer attached to the carrier. The materials of the carrier and the first dielectric layer are selected to prevent the IC integrated substrate from peeling off the carrier during processing and to allow the IC integrated substrate to naturally separate from the carrier after being cut, through the adhesion between the carrier and the first dielectric layer. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electrical devices using the above structure.

Claims

exact text as granted — not AI-modified
1 . A structure combining an IC integrated substrate and a carrier, comprising:
 a carrier; and   an IC integrated substrate formed on the carrier, the IC integrated substrate having a first dielectric layer attached to the carrier;   wherein the materials of the carrier and the IC integrated substrate are selected such that, through adhesion between the carrier and the IC integrated substrate, the IC integrated substrate does not peel off from the carrier during processing but naturally separates therefrom after being cut.   
     
     
         2 . The structure combining an IC integrated substrate and a carrier as described in  claim 1 , wherein no adhesive treatment is performed to the interface between the carrier and the first dielectric layer. 
     
     
         3 . The structure combining an IC integrated substrate and a carrier as described in  claim 1 , wherein an adhesion-diminishing treatment is performed to the interface between the carrier and the first dielectric layer. 
     
     
         4 . The structure combining an IC integrated substrate and a carrier as described in  claim 1 , wherein the IC integrated substrate comprises a multilayer interconnection structure comprising:
 at least one dielectric layer, which comprises the first dielectric layer; and   at least one metal layer;   wherein the at least one dielectric layer and the at least one metal layer are alternately formed on the carrier.   
     
     
         5 . The structure combining an IC integrated substrate and a carrier as described in  claim 4 , wherein adhesion-enhanced regions are respectively formed between adjacent dielectric layers of the multilayer interconnection structure by an adhesion-enhancing treatment. 
     
     
         6 . The structure combining an IC integrated substrate and a carrier as described in  claim 1 , wherein the IC integrated substrate further comprises:
 at least one semiconductor device formed on the first dielectric layer.   
     
     
         7 . The structure combining an IC integrated substrate and a carrier as described in  claim 6 , wherein an adhesion-enhanced region is formed between the first dielectric layer and the at least one semiconductor device by an adhesion-enhancing treatment. 
     
     
         8 . A method of manufacturing a structure combining an IC integrated substrate and a carrier, comprising:
 providing a carrier; and   forming an IC integrated substrate on the carrier, the IC integrated substrate having a first dielectric layer attached to the carrier;   wherein the materials of the carrier and the first dielectric layer are selected such that, through adhesion between the carrier and the first dielectric layer, the IC integrated substrate does not peel off from the carrier during processing but naturally separates therefrom after being cut.   
     
     
         9 . The method of manufacturing a structure combining an IC integrated substrate and a carrier as described in  claim 8 , wherein no adhesive treatment is performed to the interface between the carrier and the first dielectric layer. 
     
     
         10 . The method of manufacturing a structure combining an IC integrated substrate and a carrier as described in  claim 8 , further comprising:
 performing an adhesion-diminishing treatment to the interface between the carrier and the first dielectric layer.   
     
     
         11 . The method of manufacturing a structure combining an IC integrated substrate and a carrier as described in  claim 8 , wherein the IC integrated substrate comprises a multilayer interconnection structure, and the step of forming the IC integrated substrate comprises:
 forming at lest one dielectric layer, which comprises the first dielectric layer; and   forming at least one metal layer;   wherein the at least one dielectric layer and the at least one metal layer are alternately formed on the carrier.   
     
     
         12 . The method of manufacturing a structure combining an IC integrated substrate and a carrier as described in  claim 11 , wherein the step of forming the IC integrated substrate further comprises:
 performing an adhesion-enhancing treatment to the interface between adjacent dielectric layers of the multilayer interconnection structure.   
     
     
         13 . The method of manufacturing a structure combining an IC integrated substrate and a carrier as described in  claim 8 , wherein the step of forming the IC integrated substrate comprises:
 forming the first dielectric layer on the carrier; and   forming at least one semiconductor device on the first dielectric layer.   
     
     
         14 . The method of manufacturing a structure combining an IC integrated substrate and a carrier as described in  claim 13 , wherein the step of forming the IC integrated substrate further comprises:
 performing an adhesion-enhancing treatment to the interface between the first dielectric layer and the at least one semiconductor device.   
     
     
         15 . A method of manufacturing electronic devices, comprising:
 providing a carrier;   forming an IC integrated substrate on the carrier, the IC integrated substrate having a first dielectric layer attached to the carrier; and   cutting at least one piece from the IC integrated substrate, so that each piece cut from the IC integrated substrate naturally separates from the carrier to form an electronic device;   wherein the materials of the carrier and the first dielectric layer are selected such that, through adhesion between the carrier and the first dielectric layer, the IC integrated substrate does not peel off from the carrier during processing but naturally separates therefrom after being cut.   
     
     
         16 . The method of manufacturing electronic devices as described in  claim 15 , wherein the IC integrated substrate being cut naturally separates from the carrier by sticking with tape, clamping with fixtures, or vacuum suction. 
     
     
         17 . The method of manufacturing electronic devices as described in  claim 15 , wherein no adhesive treatment is performed to the interface between the carrier and the first dielectric layer. 
     
     
         18 . The method of manufacturing electronic devices as described in  claim 15 , further comprising:
 performing an adhesion-diminishing treatment to the interface between the carrier and the first dielectric layer.   
     
     
         19 . The method of manufacturing electronic devices as described in  claim 15 , wherein the IC integrated substrate comprises a multilayer interconnection structure, and the step of forming an IC integrated substrate comprises:
 forming at least one dielectric layer, which comprises the first dielectric layer; and   forming at least one metal layer;   wherein the at least one dielectric layer and the at least one metal layer are alternately formed on the carrier.   
     
     
         20 . The method of manufacturing electronic devices as described in  claim 19 , wherein the step of forming an IC integrated substrate further comprises:
 performing an adhesion-enhancing treatment to the interface between adjacent dielectric layers of the multilayer interconnection structure.   
     
     
         21 . The method of manufacturing electronic devices as described in  claim 15 , wherein the step of forming an IC integrated substrate comprises:
 forming the first dielectric layer on the carrier; and   forming at least one semiconductor device on the first dielectric layer.   
     
     
         22 . The method of manufacturing electronic devices as described in  claim 21 , wherein the step of forming an IC integrated substrate further comprises:
 performing an adhesion-enhancing treatment to the interface between the first dielectric layer and the at least one semiconductor device.

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