US2008029792A1PendingUtilityA1

Cmos image sensor and method for fabricating the same

Individually held — no corporate assignee on recordPriority: Dec 29, 2004Filed: Oct 3, 2007Published: Feb 7, 2008
Est. expiryDec 29, 2024(expired)· nominal 20-yr term from priority
Inventors:Hee Sung Shim
H10F 39/807H10F 39/80H10F 39/18H10F 30/20H10F 39/014H10F 39/12
56
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Claims

Abstract

A CMOS image sensor and a method for fabricating the same are disclosed, in which a dead zone and a dark current are simultaneously reduced by selective epitaxial growth. The CMOS image sensor includes a first conductive type semiconductor substrate, a second conductive type impurity ion area, a gate electrode, an insulating film formed on an entire surface of the semiconductor substrate including the gate electrode and excluding the second conductive type impurity ion area, and a silicon epitaxial layer formed on the second conductive type impurity ion area and doped with first conductive type impurity ions.

Claims

exact text as granted — not AI-modified
1 . A CMOS image sensor comprising: 
 a first conductive type semiconductor substrate defined by a photodiode area and a transistor area;    a second conductive type impurity ion area formed in the semiconductor substrate of the photodiode area;    a gate electrode formed on the semiconductor substrate of the transistor area;    an insulating film formed on an entire surface of the semiconductor substrate including the gate electrode and excluding the second conductive type impurity ion area; and    a silicon epitaxial layer formed on the second conductive type impurity ion area and doped with first conductive type impurity ions.    
   
   
       2 . The CMOS image sensor of  claim 1 , wherein the silicon epitaxial layer is formed on the second conductive type impurity ion area using a selective epitaxial growth process.  
   
   
       3 . The CMOS image sensor of  claim 1 , wherein the gate electrode is isolated from the silicon epitaxial layer by the insulating film formed at sidewalls of the gate electrode.  
   
   
       4 . The CMOS image sensor of  claim 1 , further comprising spacers formed at sidewalls of the gate electrode.  
   
   
       5 . The CMOS image sensor of  claim 4 , wherein the spacers formed at the sidewalls of the gate electrode are adjacent to the silicon epitaxial layer and are formed on the silicon epitaxial layer at the sidewalls of the gate electrode.  
   
   
       6 . The CMOS image sensor of  claim 1 , wherein the silicon epitaxial layer is higher than the surface of the semiconductor substrate below the gate electrode.  
   
   
       7 . The CMOS image sensor of  claim 1 , further comprising a first conductive type impurity ion area formed on surfaces of the photodiode area and the transistor area.  
   
   
       8 - 12 . (canceled)

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