US2008036018A1PendingUtilityA1

Method of fabricating spacers and cleaning method of post-etching and semiconductor device

Assignee: WANG CHUAN-KAIPriority: Sep 7, 2005Filed: Oct 18, 2007Published: Feb 14, 2008
Est. expirySep 7, 2025(expired)· nominal 20-yr term from priority
H10P 70/23H10P 50/283Y10S438/976H10D 64/021
50
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.

Claims

exact text as granted — not AI-modified
1 - 17 . (canceled)  
   
   
       18 . A semiconductor device, comprising: 
 a device structure having a gate structure and a pair of source/drain regions, wherein the gate structure is disposed on the substrate and the source/drain regions are disposed on the sides of the gate structure in the substrate;    spacers disposed on the sidewalls of the gate structure; and    a spacer protection layer disposed on the surface of the substrate, the spacers and the device structure.    
   
   
       19 . The semiconductor device of  claim 18 , wherein the material of the spacers includes silicon nitride.  
   
   
       20 . The semiconductor device of  claim 18 , wherein the spacer protection layer includes an oxide layer.

Join the waitlist — get patent alerts

Track US2008036018A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.