Apparatus to facilitate functional shock and vibration testing of device connections and related method

Abstract

An apparatus and associated method are disclosed for facilitating the testing of device connections, including functional shock and vibration testing of peripheral card slots or any other desired connector interface. In part, a power supply located on the peripheral device, or some other external power source, is used to power fault detection circuitry. In this way, faults can be identified, such as through visual fault indicators, without the necessity of powering the system. In addition, simulated peripheral cards are provided that include adjustable weights so that the weight distribution of an actual card can be simulated without the necessity of having a functional peripheral in hand.

1 . An apparatus for testing card slot connections, comprising: 
 a card device body having a card edge connector configured to be seated within a slot connector for another device;    a power source coupled to provide power to the card device body; and    fault detection circuitry located on the card device body and coupled to the card edge connector and to the power source, the fault detection circuitry being configured to output at least one fault indication signal when a connection fault occurs between the card edge connector and the slot connector during a test procedure.    
   
   
       2 . The apparatus of  claim 1 , wherein the power source comprises power supply circuitry located on the card device body.  
   
   
       3 . The apparatus of  claim 1 , wherein the card device body comprises a peripheral card for an information handling system.  
   
   
       4 . The apparatus of  claim 1 , wherein the card edge connector comprises a plurality of connections, and further comprising a plurality of fault indicators such that each fault indicator is associated with at least one connection and further comprising a plurality of control circuits such that each control circuit is associated with at least one fault indicator, the control circuits being configured to output a plurality of fault indication signals to control the fault indicators.  
   
   
       5 . The apparatus of  claim 4 , further comprising combining logic coupled to receive a plurality of fault indication signals from the control circuits and to provide as an output a combined fault indication signal.  
   
   
       6 . An information handling system for testing card slot connections, comprising: 
 a chassis configured to hold components for the information handling system;    a power supply for the information handling system coupled to the chassis;    a motherboard coupled to the chassis, the motherboard having a slot connector;    a card device body having a card edge connector seated within the slot connector;    a power source coupled to provide power to the card device body, the power source being different from the power supply for the information handling system; and    fault detection circuitry located on the card device body and coupled to the card edge connector and to the power source, the fault detection circuitry being configured to output at least one fault indication signal when a connection fault occurs between the card edge connector and the slot connector during a connection test procedure.    
   
   
       7 . The information handling system of  claim 6 , wherein the peripheral card has a panel located at least at one end, and further comprising a visible fault indicator located on the panel so as to be viewable from outside the chassis.  
   
   
       8 . The information handling system of  claim 6 , wherein the power source comprises power supply circuitry located on the motherboard, wherein the card device body and the motherboard have a common ground, wherein at least one ground connection on the card device body is coupled to the common ground through the slot connector, and wherein the fault detection circuitry is configured to output a fault indication signal if a connection fault occurs between the ground connection and the common ground.  
   
   
       9 . The information handling system of  claim 6 , wherein the card edge connector comprises a plurality of connections and further comprising a plurality of fault indicators coupled to the plurality of connections.  
   
   
       10 . A method for facilitating testing of card slot connections, comprising: 
 seating a card edge connector of a first card device body within a slot connector on a second device body;    powering connection fault detection circuitry on the first card device body;    conducting shock and vibration testing that includes the first card device body and the second device body; and    generating at least one fault indication signal using the connection fault detection circuitry when a connection fault occurs between the card edge connector for the first card device body and the slot connector for the second device body during the conducting step.    
   
   
       11 . The method of  claim 10 , wherein the powering step comprises powering the connection fault detection circuitry on the first card device body utilizing circuitry located on the first device body.  
   
   
       12 . The method of  claim 11 , further comprising providing a common ground connection between the first card device body and the second device body.  
   
   
       13 . The method of  claim 12 , wherein the generating step comprises generating at least one fault indication signal associated with the common ground connection.  
   
   
       14 . The method of  claim 10 , further comprising utilizing at least one visible fault indicator configured to indicate connection faults.  
   
   
       15 . The method of  claim 10 , wherein the generating step comprises generating at least one fault indication signal indicating whether a connection fault occurred at any time during testing and generating at least one fault indication signal indicating a current condition for connection continuity.  
   
   
       16 . The method of  claim 10 , further comprising providing a motherboard as the second device body and a peripheral card for the first card device body.  
   
   
       17 . The method of  claim 10 , further comprising generating an individual fault indication signal for each connection on the card edge connector of the first card device body.  
   
   
       18 . The method of  claim 17 , further comprising generating a combined fault indication signal based upon the individual fault indication signals.  
   
   
       19 . The method of  claim 10 , further comprising providing at least one visible fault indicator.  
   
   
       20 . The method of  claim 10 , further comprising powering the second device body with a separate power supply from the power source utilized for powering connection fault detection circuitry on the first card device body.