US2008057633A1PendingUtilityA1

Method for manufacturing thin film transistor array

Assignee: CHANG WON-KIEPriority: Jun 16, 2003Filed: Sep 12, 2007Published: Mar 6, 2008
Est. expiryJun 16, 2023(expired)· nominal 20-yr term from priority
H10D 86/441H10D 86/60H10D 86/40H10D 86/021H10D 86/01H10D 86/00G02F 1/136C23C 16/4405
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Claims

Abstract

The present invention relates to a method of manufacturing a thin film transistor array panel and apparatus and more particularly to an apparatus containing an in-situ fluorine generation chamber.

Claims

exact text as granted — not AI-modified
1 . A method for forming a thin film transistor (TFT) array panel, comprising: 
 forming a plurality of gate line;    forming a gate insulating layer in a first chemical vapor deposition(CVD) apparatus;    forming a semiconductor layer in the first CVD apparatus; and    cleaning the first CVD apparatus with a fluorine plasma after or before the forming the gate insulating layer and the forming the semiconductor layer,    wherein the fluorine plasma is generated with a substantially pure fluorine gas in a remote plasma source(RPS) box connected to the first CVD apparatus,    wherein the substantially pure fluorine gas is generated by 
 performing electrolysis in a fluorine generator to generate fluorine gas,  
 filtering the fluorine gas by flowing the gas through a filter with a compressor,  
   wherein the filtered gas is the substantially pure fluorine gas, and 
 compressing the substantially pure fluorine gas into a fluorine cylinder.  
   
   
   
       2 . The method of  claim 1 , wherein the performing electrolysis comprises utilizing hydrofluoric acid received into the fluorine generator from a hydrofluoric acid container.  
   
   
       3 . The method of  claim 3 , wherein forming the gate insulating layer further comprises: injecting reaction gas onto a substrate arranged in the first CVD apparatus by flowing the reaction gas through a conduit, wherein the reaction gas is received from a gate insulating formation box.  
   
   
       4 . The method of  claim 3 , wherein forming a gate insulating layer further comprises: flowing the reaction gas onto a diffusion plate for dispersing the reaction gas through a diffuser and onto the substrate.  
   
   
       5 . The method of  claim 1 , the cleaning the first CVD apparatus is performed after the forming the gate insulating layer and the forming the semiconductor layer about 6 times and about 9 times.  
   
   
       6 . The method of  claim 1 , further comprising: 
 forming a passivation layer over the gate lines, the gate insulating layer, and the semiconductor layer in a second CVD apparatus; and    cleaning the second CVD apparatus with the fluorine plasma after or before the forming the passivation layer.    
   
   
       7 . The method of  claim 6 , the cleaning the second CVD apparatus is performed after the forming the passivation about 12 times and about 20 times.  
   
   
       8 . A method for cleaning a chemical vapor deposition (CVD) apparatus, comprising: 
 generating a substantially pure fluorine gas;    generating a fluorine plasma with the substantially pure fluorine gas in a remote plasma source(RPS) box connected to the CVD apparatus; and    cleaning the CVD apparatus with the fluorine plasma after or before a predetermined CVD process,    wherein the substantially pure fluorine gas is generated by 
 performing electrolysis in a fluorine generator to generate fluorine gas,  
 filtering the fluorine gas by flowing the gas through a filter with a compressor,  
   wherein the filtered gas is the substantially pure fluorine gas, and 
 compressing the substantially pure fluorine gas into a fluorine cylinder.  
   
   
   
       9 . The method of  claim 8 , wherein the performing electrolysis comprises utilizing hydrofluoric acid received into the fluorine generator from a hydrofluoric acid container.

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