Receiver circuit

Abstract

A receiver circuit includes a photodiode, a first amplifier to convert a current of the photodiode into a voltage, a second amplifier to adjust an offset voltage of the first amplifier and a control unit to control on/off of an offset voltage adjustment function of the second amplifier. The control unit turns off the offset voltage adjustment function of the second amplifier in a predetermined period after power on.

1 . A receiver circuit comprising:
 a photodiode;   a first amplifier to convert a current of the photodiode into a voltage;   a second amplifier to adjust an offset voltage of the first amplifier; and   a switching device connected between the first amplifier and the second amplifier.   
     
     
         2 . The receiver circuit according to  claim 1 , wherein the receiver circuit further comprises:
 a control circuit to control on/off of the switching device according to power supply potential.   
     
     
         3 . A receiver circuit comprising:
 a photodiode;   a first amplifier to convert a current of the photodiode into a voltage;   a second amplifier to adjust an offset voltage of the first amplifier; and   a control unit to control on/off of an offset voltage adjustment function of the second amplifier,   wherein the control unit turns off the offset voltage adjustment function of the second amplifier in a predetermined period after power on.   
     
     
         4 . The receiver circuit according to  claim 3 , wherein the control unit comprises:
 a first transistor connected between a noninverting input terminal of the second amplifier supplied with a reference voltage and a noninverting input terminal of the first amplifier;   a second transistor connected between an output terminal of the second amplifier and the noninverting input terminal of the first amplifier; and   a control circuit to control on/off of the first and the second transistors.   
     
     
         5 . The receiver circuit according to  claim 4 , wherein the control circuit turns on the first transistor and turns off the second transistor at power on and after a predetermined period, the control circuit turns off the first transistor and turns on the second transistor. 
     
     
         6 . The receiver circuit according to  claim 3 , wherein the first amplifier has a wider band characteristic than the second amplifier. 
     
     
         7 . The receiver circuit according to  claim 3 , wherein the second amplifier has a smaller input offset voltage than the first amplifier. 
     
     
         8 . The receiver circuit according to  claim 3 , wherein the first and the second amplifiers include a plurality of transistors and a gate length and/or a gate width of the transistors included in the first amplifier is smaller than a gate length and/or a gate width of the transistors included in the second amplifier.