Semiconductor integrated circuit
Abstract
An electro static discharge protection element being formed by a diode including a well region of a first conductivity type on a surface of a semiconductor substrate, and a first diffusion layer of a second conductivity type in the well region. The first diffusion layer is surrounded by a second diffusion layer of the first conductivity type in the well region. The first diffusion layer has a surface on which a first contact region connected to an input/output terminal is formed. The first diffusion layer has a surface on which a second contact region connected to a reference voltage terminal is formed.
Claims
exact text as granted — not AI-modified1 . A semiconductor integrated circuit device comprising an electro static discharge protection element,
the electro static discharge protection element being formed by a diode including:
a well region of a first conductivity type in a semiconductor substrate; and
a first diffusion layer of a second conductivity type in the well region,
wherein the first diffusion layer is surrounded by a second diffusion layer of the first conductivity type in the well region, the first diffusion layer has a surface on which a first contact region connected to an input/output terminal is formed, and the second diffusion layer has a surface on which a second contact region connected to a reference voltage terminal is formed.
2 . The semiconductor integrated circuit device of claim 1 , wherein
a dielectric isolation region is formed between the first diffusion layer and the second diffusion layer.
3 . The semiconductor integrated circuit device of claim 1 , wherein
the first diffusion layer is rectangular in shape, and the second contact region is formed only in a portion facing a long side of the first diffusion layer.
4 . The semiconductor integrated circuit device of claim 3 , wherein the second contact region has end portions arranged in a position in alignment with end portions of the first contact region formed along a longitudinal direction of the first diffusion layer.
5 . The semiconductor integrated circuit device of claim 1 , wherein
the first diffusion layer is rectangular in shape, and the first contact region formed along a longitudinal direction of the first diffusion layer has end portions which are greater in area than the other portions of the first contact region.
6 . The semiconductor integrated circuit device of claim 1 , wherein
the first diffusion layer is rectangular in shape, and a width of the second diffusion layer facing a short side of the first diffusion layer is narrower than a width of the second diffusion layer facing a long side of the first diffusion layer.
7 . The semiconductor integrated circuit device of claim 1 , wherein
the first diffusion layer is rectangular in shape, and a distance between the first diffusion layer and the second diffusion layer along a long side of the first diffusion layer is narrower than a distance between the first diffusion layer and the second diffusion layer along a short side of the first diffusion layer.
8 . The semiconductor integrated circuit device of claim 1 , wherein
the first diffusion layer is formed into a plurality of divided diffusion regions, and the second diffusion layer is formed also between the divided diffusion regions.
9 . The semiconductor integrated circuit device of claim 8 , wherein the divided diffusion regions are arranged at a regular interval.
10 . The semiconductor integrated circuit device of claim 1 , wherein the first contact region and the second contact region are respectively formed into a plurality of divided contact regions.Join the waitlist — get patent alerts
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