US2008087980A1PendingUtilityA1

Semiconductor device and method for fabricating a semiconductor device

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Assignee: CHO JUN-HEEPriority: Jun 27, 2005Filed: Dec 4, 2007Published: Apr 17, 2008
Est. expiryJun 27, 2025(expired)· nominal 20-yr term from priority
Inventors:Jun-Hee Cho
H10W 10/17H10W 10/014H10W 10/181H10W 10/061H10W 10/021H10W 10/20H10P 90/1906H10D 84/038H10P 10/00H10D 84/0151H10D 86/201H10D 86/01
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Claims

Abstract

A semiconductor structure has an active region on a substrate, and recessed portions are formed at lower edges of lateral portions of the semiconductor structure. Patterned first insulation layers for device isolation are buried into the recessed portions. Second insulation layers for device isolation are formed on sidewalls of the first insulation layers.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, comprising: 
 a semiconductor structure having an active region on a substrate, and recessed portions formed at lower edges of lateral portions of the semiconductor structure;    a plurality of patterned first insulation layers for device isolation buried into the recessed portions; and    a plurality of second insulation layers for device isolation formed on sidewalls of the first insulation layers.    
   
   
       2 . The semiconductor device of  claim 1 , wherein the semiconductor structure comprises a first semiconductor layer formed between the recessed portions, and a second semiconductor layer formed on the first semiconductor layer and having a width wider than that of the first semiconductor layer.  
   
   
       3 . The semiconductor device of  claim 2 , wherein the first semiconductor layer comprises single crystal silicon grown by one of a solid phase epitaxy (SPE) process and a silicon epitaxy growth (SEG) process.  
   
   
       4 . The semiconductor device of  claim 2 , wherein the second semiconductor layer comprises silicon grown by an epitaxial lateral overgrowth (ELO) process.  
   
   
       5 . The semiconductor device of  claim 1 , wherein each of the plurality of patterned first insulation layers comprises one of an oxide layer and a nitride layer.  
   
   
       6 . The semiconductor device of  claim 1 , wherein each of the plurality of second insulation layers comprises a high density plasma (HDP) layer formed through a chemical vapor deposition (CVD) method.  
   
   
       7 . A semiconductor device, comprising: 
 a semiconductor structure having an active region on a substrate and including recessed portions formed at lower edges of lateral portions of the semiconductor structure; and    a plurality of insulation layers for device isolation formed to be aligned with upper edges of the semiconductor structure.    
   
   
       8 . The semiconductor device of  claim 7 , wherein the semiconductor structure comprises a first semiconductor layer formed between the recessed portions, and a second semiconductor layer formed on the first semiconductor layer and having a width wider that that of the first semiconductor layer.  
   
   
       9 . The semiconductor device of  claim 8 , wherein the first semiconductor layer comprises single crystal silicon grown by one of a solid phase epitaxy (SPE) process and a silicon epitaxy growth (SEG) process.  
   
   
       10 . The semiconductor device of  claim 8 , wherein the second semiconductor layer comprises silicon grown by an epitaxial lateral overgrowth (ELO) process.  
   
   
       11 . The semiconductor device of  claim 10 , wherein each of the plurality of insulation layers comprises a high density plasma (HDP) layer formed through a chemical vapor deposition (CVD) method.

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