US2008090322A1PendingUtilityA1

Method of forming an implantable electronic device chip level hermetic and biocompatible electronics package using SOI wafers

48
Assignee: MECH BRIAN VPriority: Jan 17, 2003Filed: Aug 15, 2007Published: Apr 17, 2008
Est. expiryJan 17, 2023(expired)· nominal 20-yr term from priority
H10W 10/181H10P 90/1914H10D 86/201H10D 86/01
48
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The invention is directed to a hermetically packaged and implantable integrated circuit for electronics that is made my producing streets in silicon-on-insulator chips that are subsequently coated with a selected electrically insulating thin film prior to completing the dicing process to yield an individual chip. A thin-layered circuit may transmit light, allowing a photodetector to respond to transmitted light to stimulate a retina, for example. Discrete electronic components may be placed in the three-dimensional street area of the integrated circuit package, yielding a completely integrated hermetic package that is implantable in living tissue.

Claims

exact text as granted — not AI-modified
1 . A method of forming an implantable electronic device, comprising the steps of: 
 selecting a silicon-on-insulator chip assembly that comprises a silicon layer and an insulator substrate that has a thickness, said silicon layer bonded to said insulator substrate;    making a street that passes through said silicon layer and that passes partially through said thickness of said insulator substrate;    coating said silicon layer and said street with a coating; and    extending said street through said thickness of said insulator substrate.    
   
   
       2 . The method according to  claim 1 , further comprising the steps of: 
 selecting said insulator substrate that is transparent to electromagnetic radiation; and 
 mounting at least one photoelectric cell on said insulator substrate to detect said electromagnetic radiation.  
   
   
   
       3 . The method according to  claim 1 , further comprising the steps of: 
 selecting a discrete electronic component; and    embedding said discrete electronic component in said insulator substrate.    
   
   
       4 . The method according to  claim 1 , further comprising the steps of: 
 selecting said coating from the group consisting of diamond, ultra-nanocrystalline diamond, ceramics, or alumina; and    depositing said coating by ion beam assisted deposition.    
   
   
       5 . The method according to  claim 1  wherein said silicon layer comprises an integrated circuit.  
   
   
       6 . The method according to  claim 1  wherein said insulator substrate has an exposed area of said insulator substrate that is covered by said hermetic electrically insulating thin film.  
   
   
       7 . The method according to  claim 1  wherein said hermetic electrically insulating thin film is comprised of alumina.  
   
   
       8 . The method according to  claim 1  wherein said hermetic electrically insulating thin film is comprised of diamond.  
   
   
       9 . The method according to  claim 1  wherein said hermetic electrically insulating thin film is biocompatible.  
   
   
       10 . The method according to  claim 1  wherein said at least one discrete electronic component is further comprised of a capacitor.  
   
   
       11 . The method according to  claim 1  wherein said at least one discrete electronic component is embedded.  
   
   
       12 . The method according to  claim 1  wherein said insulator substrate is transparent to light.  
   
   
       13 . The method according to  claim 1  wherein said silicon layer contains at least one photoelectric cell that produces an electric impulse when stimulated by electromagnetic radiation.  
   
   
       14 . The method according to  claim 1  wherein said silicon layer contains at least one photoelectric cell that produces an electric impulse when stimulated by light.  
   
   
       15 . The method according to  claim 1  wherein said insulator substrate is glass.  
   
   
       16 . The method according to  claim 1  wherein said insulator substrate is sapphire.  
   
   
       17 . The method according to  claim 1  wherein said electronics package comprises a neural prosthesis.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.