Wide-range multi-phase clock generator
Abstract
A wide-range multi-phase clock generator having a first clock generating circuit, a frequency divider circuit, and a plurality of multiplexers. The first clock generating circuit generates a plurality of first clock signals, each having a first frequency and a respective one of a plurality of different phase angles. The frequency divider circuit receives the plurality of first clock signals from the first clock generating circuit, and generates a plurality of second clock signals, each having a second frequency and a respective one of the plurality of different phase angles. The multiplexers each have a first input coupled to receive a respective one of the first clock signals and a second input coupled to receive a respective one of the second clock signals having substantially the same phase angle as the one of the first clock signals.
Claims
exact text as granted — not AI-modified1 . An integrated circuit device comprising: a clock generating circuit to generate a plurality of first clock signals each having a first frequency and a respective one of a plurality of different phase angles; a frequency divider circuit coupled to receive the plurality of first clock signals and configured to generate a plurality of second clock signals each having a second frequency and a respective one of the plurality of different phase angles; and a plurality of multiplexers each having a first input coupled to receive a respective one of the first clock signals and a second input coupled to receive a respective one of the second clock signals having substantially the same phase angle as the one of the first clock signals.
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