Multiple Execution-Path System

Abstract

A multiple execution-path flash system includes a main flash image with primary and secondary POST and Boot executable files. The secondary executables are offset from the primary executables by a predetermined offset address. If corrupted data is encountered during Boot, the exception handler sets an offset bit resulting in the predetermined offset address being added to the current instruction address. If corrupted data is encountered in the secondary executables, the offset bit is reset. An optional redundant flash image may also be used. A failure at the same relative address in the primary and secondary executables of the main flash image will cause the exception handler to transfer control to the redundant flash image. A subsequent failure at the same relative address in the primary and secondary executables of the redundant flash image will cause the redundant exception handler to transfer control back to the main flash image.

1 . A multiple execution-path system, comprising: 
 a processing device; and    a main memory device storing a main image including a main primary Boot executable file, a main secondary Boot executable file that is identical to the primary Boot executable file upon being written to the main memory device and is offset from the main primary Boot executable file by an offset value, and a main exception handling executable file;    wherein the main exception handling executable file is adapted to identify a first error condition indicative of corrupted information in the main primary Boot executable file and to transfer a control of a Boot process from the main primary Boot executable file to the main secondary Boot executable file.    
   
   
       2 . The multiple execution-path system of  claim 1 , wherein the processing device is an embedded processor.  
   
   
       3 . The multiple execution-path system of  claim 1 , wherein the main memory device is a flash memory device.  
   
   
       4 . The multiple execution-path system of  claim 1 , wherein the processing device includes an offset bit.  
   
   
       5 . The multiple execution-path system of  claim 1 , wherein the main exception handling executable file is further adapted to identify a second error condition indicative of corrupted information in the main secondary Boot executable file and to transfer the control of the Boot process from the main secondary Boot executable file to the main primary Boot executable file.  
   
   
       6 . The multiple execution-path system of  claim 1 , further comprising a redundant memory device including a redundant image and wherein the main exception handling executable file is adapted to identify a third error condition indicative of corrupted information in the main primary Boot executable file and at a first same relative location within the main secondary Boot executable file and to transfer the control of the Boot process from the main image to the redundant image.  
   
   
       7 . The multiple execution-path system of  claim 6 , wherein the redundant image includes a redundant primary executable file, a redundant secondary executable file, and a redundant exception handling executable file adapted to identify a fourth error condition indicative of corrupted information in the redundant primary Boot executable file and at a second same relative location within the redundant secondary Boot executable file and to transfer the control of the Boot process from the redundant image to the main image.  
   
   
       8 . The multiple execution-path system of  claim 6 , further comprising an external process for identifying a first error message generated by the main exception handling executable file indicative of the third error condition, said external process being adapted to set a switch effecting the transfer and to reset the multiple execution-path system.  
   
   
       9 . An article of manufacture including a data storage medium, said data storage medium including a set of machine-readable instructions that are executable by a processing device to implement an algorithm, said algorithm comprising the steps of: 
 detecting corrupt information within a main primary executable file residing in a main image within a main memory device; and    transferring a control of a Boot process from the main primary executable file to a main secondary executable file residing in the main image, wherein the main secondary executable file is identical to the main primary executable file upon being written to the main memory device.    
   
   
       10 . The article of manufacture of  claim 9 , further comprising the steps of: 
 detecting corrupt information within the main secondary executable file; and    transferring the control of the Boot process from the main secondary executable file to a main primary executable file residing in the main image.    
   
   
       11 . The article of manufacture of  claim 9 , further comprising the steps of: 
 detecting corrupt information within the main secondary executable file; and    transferring the control of the Boot process from the main image to a redundant image.    
   
   
       12 . The article of manufacture of  claim 10 , further comprising the steps of: 
 detecting corrupt information at a first location within the main primary executable file and a first same relative location within the main secondary executable file; and    transferring the control of the Boot process from the main image to a redundant image.    
   
   
       13 . The article of manufacture of  claim 12 , further comprising the steps of: 
 detecting corrupt information at a second location within a redundant primary executable file and a second same relative location within a redundant secondary executable file; and    transferring the control of the Boot process from the redundant image to the main image.