Displaying heterogeneous video

Abstract

Heterogeneous video may be independently encoded in a processor-based system and transmitted for display on a display device. In the display device, the independent video streams may be de-packetized for display on the same display at different frame rates. Thus, each of the video sources may be displayed in a separate portion of the display at its native frame rate. For example, an electronic programming guide may be transmitted for display at one frame rate and displayed in a distinct region on the display screen while video corresponding to an ongoing television program may be displayed in another portion of the display screen at its native frame rate.

1 . A system comprising: 
 a semiconductor substrate;    a liquid crystal over semiconductor pixel array formed in said substrate;    a memory coupled to said array, said memory also formed in said substrate; and    a device for receiving a signal made up of a plurality of independent video sources and driving each of said video sources for display on a different portion of said pixel array.    
   
   
       2 . The system of  claim 1  wherein said system includes a device that de-packetizes said signal to form independent video sources for display on said pixel array.  
   
   
       3 . The system of  claim 2  wherein said pixel array includes a plurality of pixels including a memory cell.  
   
   
       4 . The system of  claim 3  wherein said memory cells are static random access memory cells.  
   
   
       5 . The system of  claim 2  wherein said pixel array is coupled to said memory by a digital to analog converter.  
   
   
       6 . The system of  claim 2  wherein said memory includes a cell associated with each of a plurality of pixels of said pixel array.