US2008108198A1PendingUtilityA1

Transistor structures and methods for making the same

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Assignee: UNIV OREGONPriority: May 21, 2002Filed: Jan 3, 2008Published: May 8, 2008
Est. expiryMay 21, 2022(expired)· nominal 20-yr term from priority
H10D 99/00H10D 64/62H10D 30/6755H10D 30/6743H10D 30/6739H10D 30/6737H10D 30/675H10D 62/00
49
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Claims

Abstract

Enhancement mode, field effect transistors wherein at least a portion of the transistor structure may be substantially transparent. One variant of the transistor includes a channel layer comprising a substantially insulating, substantially transparent, material selected from ZnO, SnO 2 , or In 2 O 3 . A gate insulator layer comprising a substantially transparent material is located adjacent to the channel layer so as to define a channel layer/gate insulator layer interface. A second variant of the transistor includes a channel layer comprising a substantially transparent material selected from substantially insulating ZnO, SnO 2 or In 2 O 3 , the substantially insulating ZnO, SnO 2 , or In 2 O 3 being produced by annealing. Devices that include the transistors and methods for making the transistors are also disclosed.

Claims

exact text as granted — not AI-modified
1 . A method for making an enhancement mode, field effect transistor comprising: 
 depositing ZnO, SnO 2 , or In 2 O 3  onto at least a portion of a surface of a gate insulating layer; and    annealing the ZnO, SnO 2 , or In 2 O 3  for about 1 minute to about 2 hours at a temperature of about 300 to about 1000° C. in an oxidative or inert atmosphere.    
   
   
       2 . The method according to  claim 1 , wherein ZnO is deposited.  
   
   
       3 . The method according to  claim 1 , wherein the gate insulator layer comprises a substantially transparent material.  
   
   
       4 . The method according to  claim 1 , wherein the annealing temperature is about 700 to about 800° C.  
   
   
       5 . The method according to  claim 1 , further comprising depositing on the ZnO, SnO 2  or In 2 O 3  layer at least one material for forming a source and a drain.  
   
   
       6 . The method according to  claim 1 , further comprising depositing on the gate insulating layer at least one material for forming a source and a drain prior to depositing the ZnO, SnO 2 , or In 2 O 3 .  
   
   
       7 . The method according to  claim 6 , wherein the material for forming a source and a drain is ion beam sputtered deposited onto the gate insulating layer, and the annealing of the ZnO diffusion dopes the ZnO with the source and drain material.  
   
   
       8 . A method for making an enhancement mode, field effect transistor comprising: 
 depositing ZnO, SnO 2  or In 2 O 3  onto at least a portion of a surface of a gate insulating layer; and    treating the ZnO, SnO 2  or In 2 O 3  such that the treated ZnO, SnO 2 , or In 2 O 3  has a higher resistivity and a lower oxygen vacancy concentration relative to the untreated ZnO, SnO 2 , or In 2 O 3 .    
   
   
       9 . The method according to  claim 2 , further comprising introducing an acceptor dopant into the ZnO.  
   
   
       10 . The method according to  claim 1 , wherein the depositing of ZnO, SnO 2 , or In 2 O 3  comprises sputter depositing the ZnO, SnO 2 , or In 2 O 3  in an atmosphere that includes at least one sputter gas and at least one gas that can modify a film formed by the ZnO, SnO 2 , or In 2 O 3 .  
   
   
       11 . The method according to  claim 10 , wherein the film-modifying gas comprises at least one gas selected from an oxidative gas or a dopant gas.  
   
   
       12 . The method according to  claim 11 , wherein the oxidative gas comprises oxygen and the dopant gas comprises nitrogen.  
   
   
       13 . The method according to  claim 1 , wherein the ZnO, SnO 2 , or In 2 O 3  is annealed for about 1 minute to about 5 minutes.  
   
   
       14 . The method according to  claim 1 , wherein the deposited and annealed ZnO, SnO 2 , or In 2 O 3  forms a channel layer comprising a substantially insulating, substantially transparent, material.  
   
   
       15 . The method according to  claim 2 , wherein the ZnO is vapor deposited.  
   
   
       16 . The method according to  claim 1 , wherein the field effect transistor exhibits an optical transmission through the field effect transistor of at least about 70% in the visible portion of the electromagnetic spectrum.  
   
   
       17 . The method according to  claim 1 , wherein the In 2 O 3  or SnO 2  is deposited via chemical vapor deposition, sputtering, spin-coating, physical vapor deposition, vapor phase epitaxy, or molecular beam epitaxy.  
   
   
       18 . The method according to  claim 1 , wherein In 2 O 3  is deposited.  
   
   
       19 . The method according to  claim 10 , wherein the annealing temperature is at least about 700° C.  
   
   
       20 . The method according to  claim 1 , wherein the annealing temperature is at least about 700° C.  
   
   
       21 . The method according to  claim 11 , wherein the oxidative gas comprises O 2 , N 2 O or a mixture thereof.  
   
   
       22 . The method according to  claim 11 , wherein the dopant gas comprises N 2 , or NH 3 .

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