Device for Measurement and Analysis of Electrical Signals of an Integrated Circuit Component

Abstract

According to the invention, one or more external test connection contact points (pads; pins; balls), are provided in an integrated circuit component (chip) ( 1 ), through which signals ( 4, 5, 6 ) that are to be measured or analyzed are selectively fed, e.g. by means of a multiplex circuit ( 7,8 ), and wherein the signals may be connected by means of routes located internally in the component from switch points that are not directly accessible, e.g. points inside the chip ( 15 to 20 ) or covered contact points. The device according to the invention is particularly useful for highly integrated semiconductor chips.

1 . An integrated circuit, comprising: 
 a plurality of inaccessible circuit points;    a first externally accessible contact; and    a multiplexer connected to said contact and said plurality of circuit points;    wherein said integrated circuit provides a reference signal and electrical signals at said inaccessible circuit points.    
   
   
       2 . An integrated circuit according to  claim 1 , wherein said multiplexer selectively couples one of said circuit points to said first contact.  
   
   
       3 . An integrated circuit according to  claim 1 , further comprising a second externally accessible contact, wherein said multiplexer is connected to said second contact.  
   
   
       4 . An integrated circuit according to  claim 3 , further comprising a second multiplexer, wherein said second multiplexer selectively passes said electrical signals to one of said first externally accessible contact and said second externally accessible contact.  
   
   
       5 . An integrated circuit according to  claim 1 , wherein said reference signal is adapted to be monitored for test purposes.  
   
   
       6 . An integrated circuit according to  claim 1 , wherein said electrical signals are internal chip signals, and said reference signal is used to monitor the timing of said internal chip signals.  
   
   
       7 . An integrated circuit according to  claim 1 , wherein said integrated circuit is formed as part of a package, wherein said first externally accessible contact is disposed on said package.  
   
   
       8 . An integrated circuit according to  claim 1 , wherein said multiplexer is time-controlled.  
   
   
       9 . An integrated circuit according to  claim 1 , wherein said first externally accessible contact can receive inputting signals to said plurality of inaccessible circuit points.  
   
   
       10 . An integrated circuit, comprising: 
 a plurality of inaccessible circuit points;    a first externally accessible contact and a second externally accessible contact; and    a multiplexer connected to said first and second externally accessible contacts and said plurality of circuit points,    wherein said integrated circuit provides a reference signal and electrical signals at said circuit points.    
   
   
       11 . An integrated circuit according to  claim 10 , further comprising a second multiplexer, wherein the second multiplexer selectively passes said electrical signals to said first and second externally accessible contacts.  
   
   
       12 . An integrated circuit according to  claim 10 , wherein said electrical signals are internal chip signals, and said reference signal is used to monitor the timing of said internal chip signals.  
   
   
       13 . An integrated circuit according to  claim 10 , further comprising a package, wherein said first externally accessible contact is disposed on said package.  
   
   
       14 . An integrated circuit according to  claim 10 , wherein said first externally accessible contacts can receive inputting signals to said plurality of inaccessible circuit points.  
   
   
       15 . A method of providing access to externally inaccessible circuit points on an integrated circuit comprising: 
 providing a first externally accessible contact on said integrated circuit; and    providing a multiplexer connected to said contact and said plurality of circuit points,    wherein said integrated circuit provides a reference signal and electrical signals.    
   
   
       16 . A method according to  claim 15 , wherein said electrical signals and said reference signal are monitored for test purposes.  
   
   
       17 . A method according to  claim 15 , further comprising monitoring the timing of said electrical signals using said reference signal.  
   
   
       18 . A method according to  claim 15 , further comprising providing a second externally accessible contact, said multiplexer being connected to said second contact.  
   
   
       19 . A method according to  claim 18 , further comprising providing a second multiplexer and selectively passing said electrical signals to said first and second contacts via said second multiplexer.  
   
   
       20 . A method according to  claim 15 , further comprising time-controlling said multiplexer.  
   
   
       21 . A method according to  claim 15 , further comprising inputting signals to said plurality of inaccessible circuit points via said first externally accessible contact.