Systems and methods for back end of line processing of semiconductor circuits
Abstract
A BEOL manufacturing process for forming a via on a semiconductor wafer comprises depositing a portion of a first metal adhesion layer within a patterned via hole, followed by a cooling step. The cooling step is then followed by formation of the remainder of the first metal adhesion layer and formation of a second metal adhesion layer within the patterned via hole. This process of forming the remaining portion of the first metal adhesion layer can be referred to as a load, unload, load (LUL) process. By using a LUL process, thermal processing is minimized, which reduces Al extrusion at the via interfaces.
Claims
exact text as granted — not AI-modified1 . A method for forming via on a semiconductor wafer in a back end of the line (BEOL) process, comprising:
patterning a via hole for formation of the via; forming a portion of a first metal adhesion layer in the patterned via hole; cooling the wafer; forming the remaining portion of the first metal adhesion layer in the patterned via hole; and forming a second metal adhesion layer inside the first metal adhesion layer within the patterned via hole.
2 . The method of claim 1 , further comprising cleaning the wafer before forming the portion of the first metal adhesion layer.
3 . The method of claim 2 , further comprising cooling the wafer after cleaning the wafer and before forming the portion of the first metal adhesion layer.
4 . The method of claim 1 , further comprising cooling the wafer after forming the second metal adhesion layer.
5 . The method of claim 1 , wherein forming the portion of the first metal adhesion layer comprises depositing the portion of the first metal adhesion layer within the patterned via hole.
6 . The method of claim 5 , wherein the portion of the first metal adhesion layer is deposited using physical vapor deposition.
7 . The method of claim 1 , wherein forming the remainder of the first metal adhesion layer comprises depositing the remainder of the first metal adhesion layer within the patterned via hole.
8 . The method of claim 7 , wherein the remainder of the first metal adhesion layer is deposited using physical vapor deposition.
9 . The method of claim 1 , wherein forming the second metal adhesion layer comprises depositing the second metal adhesion layer within the patterned via hole.
10 . The method of claim 9 , wherein the portion of the first metal adhesion layer is deposited using metal organic chemical vapor deposition.
11 . The method of claim 1 , further comprising forming a metal plug inside the first and second metal adhesion layers within the patterned via hole.
12 . A method for forming via on a semiconductor wafer in a back end of the line (BEOL) process, comprising:
forming a first metal layer; patterning a via hole for formation of the via; forming a portion of a first metal adhesion layer in the patterned via hole; cooling the wafer; forming the remaining portion of the first metal adhesion layer in the patterned via hole; forming a second metal adhesion layer within the first metal adhesion layer within the patterned via hole; forming a metal plug inside the first and second metal adhesion layers within the patterned via hole.
13 . The method of claim 12 , further comprising cleaning the wafer before forming the portion of the first metal adhesion layer.
14 . The method of claim 13 , further comprising cooling the wafer after cleaning the wafer and before forming the portion of the first metal adhesion layer.
15 . The method of claim 12 , further comprising cooling the wafer after forming the second metal adhesion layer.
16 . The method of claim 12 , wherein forming the portion of the first metal adhesion layer comprises depositing the portion of the first metal adhesion layer within the patterned via hole.
17 . The method of claim 16 , wherein the portion of the first metal adhesion layer is deposited using physical vapor deposition.
18 . The method of claim 12 , wherein forming the remainder of the first metal adhesion layer comprises depositing the remainder of the first metal adhesion layer within the patterned via hole.
19 . The method of claim 18 , wherein the remainder of the first metal adhesion layer is deposited using physical vapor deposition.
20 . The method of claim 12 , wherein forming the second metal adhesion layer comprises depositing the second metal adhesion layer within the patterned via hole.
21 . The method of claim 20 , wherein the portion of the first metal adhesion layer is deposited using metal organic chemical vapor deposition.
22 . The method of claim 12 , wherein forming the portion of the first metal adhesion layer comprises heating the wafer to approximately 200° C.
23 . The method of claim 22 , wherein forming the portion of the first metal adhesion layer comprises heating the wafer for approximately 49 seconds.
24 . The method of claim 12 , wherein forming the remainder of the first metal adhesion layer comprises heating the wafer to approximately 200° C.
25 . The method of claim 24 , wherein forming the remainder of the first metal adhesion layer comprises heating the wafer for approximately 49 seconds.
26 . The method of claim 12 , wherein forming the second metal adhesion layer comprises heating the wafer to approximately 450° C.
27 . The method of claim 26 , wherein forming the second metal adhesion layer comprises heating the wafer for approximately 177 seconds.Join the waitlist — get patent alerts
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