US2008122082A1PendingUtilityA1

Semiconductor device and semiconductor package containing the same

Assignee: OKI ELECTRIC IND CO LTDPriority: Nov 28, 2006Filed: Nov 14, 2007Published: May 29, 2008
Est. expiryNov 28, 2026(~0.3 yrs left)· nominal 20-yr term from priority
H10W 72/9415H10W 72/952H10W 72/923H10W 72/701H10W 72/251H10W 72/077H10W 72/072H10W 20/43H10W 74/131H10W 72/20H10W 90/701
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Claims

Abstract

According to the present invention, a semiconductor device, having an electrode pad as a part of wirings on the uppermost layer thereof, includes a passivation film and a bump electrode for external connection. The passivation film is formed on the electrode pad, and the bump electrode is formed on the passivation film and electrically connected to the electrode pad. The electrode pad is formed so as to be smaller in size than the bump electrode, and a part of the wiring on the uppermost layer are formed under the bump electrode. In this manner, it is possible to utilize the area under the bump electrode effectively without sacrificing flatness of the passivation film. As a result, the semiconductor device and the semiconductor package can be made smaller.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device, having an electrode pad as a part of an uppermost wiring layer, comprising:
 a passivation film, which is formed on the electrode pad to have an opening therein; and   a bump electrode for external connection, which is formed on the passivation film and is electrically connected to the electrode pad through the opening of the passivation film, wherein   the electrode pad is formed so as to be smaller in size than the bump electrode; and   a part of the uppermost wiring layer is formed under the bump electrode.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein
 the semiconductor device is a LCD driver chip.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein
 the part of the uppermost wiring layer formed under the bump electrode is a power wiring.   
     
     
         4 . The semiconductor device according to  claim 2 , wherein
 the part of the uppermost wiring layer formed under the bump electrode is a power wiring.   
     
     
         5 . A semiconductor package, having the semiconductor device according to  claim 1 , wherein
 the semiconductor package is fabricated using a film carrier having a plurality of leads, which are held on an insulating film, and an end of each of the leads are connected to the bump electrode as an inner lead.   
     
     
         6 . The semiconductor package according to  claim 5 , wherein
 the inner lead and the bump electrode are connected by a thermal compression bonding process.   
     
     
         7 . The semiconductor package according to  claim 5  further comprising:
 a resin member which protects the semiconductor device and the inner lead.   
     
     
         8 . The semiconductor package according to  claim 6  further comprising:
 a resin member which protects the semiconductor device and the inner lead.

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